? 2005 Fairchild Semiconductor Corporation DS009943
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November 1988Revised March 2005
74AC244 ? 74ACT244 Octal Buffer/Line Driver with 3-STATE Outputs
74AC244 ? 74ACT244
Octal Buffer/Line Driver with 3-STATE Outputs
General Description
The AC/ACT244 is an octal buffer and line driver designed to be employed as a memory address driver, clock driver and bus-oriented transmitter/receiver which provides improved PC board density.
Features
s I CC and I OZ reduced by 50%
s 3-STATE outputs drive bus lines or buffer memory address registers s Outputs source/sink 24 mA s ACT244 has TTL-compatible inputs
Ordering Code:
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.Pb-Free package per JEDEC J-STD-020B.
Note 1: “_NL” indicates Pb-Free package (per JEDEC J-STD-020B). Please use order number as indicated.
FACT ¥ is a trademark of Fairchild Semiconductor Corporation.
Order Number Package Package Description
Number 74AC244SC M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide 74AC244SCX_NL (Note 1)M20B Pb-Free 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide 74AC244SJ M20D Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74AC244MTC MTC2020-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 74AC244MTCX_NL (Note 1)MTC20Pb-Free 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74AC244PC N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide 74ACT244SC M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide 74ACT244SCX_NL (Note 1)M20B Pb-Free 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide 74ACT244SJ M20D Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74ACT244MSA MSA2020-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide 74ACT244MTC MTC2020-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 74ACT244MTCX_NL (Note 1)MTC20Pb-Free 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74ACT244PC
N20A
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
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74A C 244 ? 74A C T 244
Logic Symbol
IEEE/IEC
Connection Diagram
Pin Descriptions
Truth Tables
X Immaterial
Z High Impedance
Pin Names Description
OE 1, OE 23-STATE Output Enable Inputs
I 0–I 7Inputs O 0–O 7
Outputs
Inputs Outputs
OE 1I n (Pins 12, 14, 16, 18)
L L L L H H H
X
Z Inputs Outputs
OE 2I n (Pins 3, 5, 7, 9)
L L L L H H H
X
Z
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74AC244 ? 74ACT244
Absolute Maximum Ratings (Note 2)
Recommended Operating Conditions
Note 2: Absolute maximum ratings are those values beyond which damage
to the device may occur. The databook specifications should be met, with-out exception, to ensure that the system design is reliable over its power supply, temperature, and output/input loading variables. Fairchild does not recommend operation of FACT ¥ circuits outside databook specifications.
DC Electrical Characteristics for AC
Note 3: All outputs loaded; thresholds on input associated with output under test.Note 4: Maximum test duration 2.0 ms, one output loaded at a time.
Note 5: I IN and I CC @ 3.0V are guaranteed to be less than or equal to the respective limit @ 5.5V V CC .
Supply Voltage (V CC ) 0.5V to 7.0V
DC Input Diode Current (I IK )V I 0.5V 20 mA V I V CC 0.5V 20 mA
DC Input Voltage (V I )
0.5V to V CC 0.5V
DC Output Diode Current (I OK )V O 0.5V 20 mA V O V CC 0.5V 20 mA
DC Output Voltage (V O ) 0.5V to V CC 0.5V
DC Output Source or Sink Current (I O )r 50 mA DC V CC or Ground Current per Output Pin (I CC or I GND )r 50 mA
Storage Temperature (T STG ) 65q C to 150q C
Junction Temperature (T J )PDIP
140q C
Supply Voltage (V CC )AC 2.0V to 6.0V ACT
4.5V to
5.5V
Input Voltage (V I )0V to V CC Output Voltage (V O )
0V to V CC
Operating Temperature (T A ) 40q C to 85q C
Minimum Input Edge Rate ('V/'t)AC Devices
V IN from 30% to 70% of V CC V CC @ 3.3V, 4.5V, 5.5V 125 mV/ns
Minimum Input Edge Rate ('V/'t)ACT Devices V IN from 0.8V to 2.0V V CC @ 4.5V, 5.5V
125 mV/ns
Symbol Parameter V CC T A 25q C T A 55q C to 125q C T A 40q C to 85q C
Units
Conditions (V)Typ Guaranteed Limits V IH
Minimum HIGH Level 3.0 1.5 2.1 2.1 2.1V OUT 0.1V Input Voltage
4.5 2.25 3.15 3.15 3.15V or V CC 0.1V
5.5 2.75 3.85 3.85 3.85V IL
Maximum LOW Level 3.0 1.50.90.90.9V OUT 0.1V Input Voltage
4.5 2.25 1.35 1.35 1.35V
or V CC 0.1V 5.5 2.75 1.65 1.65 1.65V OH
Minimum HIGH Level 3.0 2.99 2.9 2.9 2.9Output Voltage
4.5 4.49 4.4 4.4 4.4V
I OUT 50 P A 5.5 5.49
5.4 5.4 5.43.0 2.56 2.4 2.46I OH 12 mA 4.5 3.86 3.7 3.76V
I OH 24 mA 5.5
4.86 4.7 4.76I OH 24 mA (Note 3)V OL
Maximum LOW Level 3.00.0020.10.10.1Output Voltage
4.50.0010.10.10.1V
I OUT 50 P A 5.50.0010.10.10.13.00.360.500.44I OL 12 mA 4.50.360.500.44V
I OL 24 mA 5.5
0.360.500.44I OL 24 mA (Note 3)I IN Maximum Input 5.5
r 0.1
r 1.0
r 1.0
P A V I V CC , GND (Note 5)Leakage Current I OZ
Maximum V I (OE) V IL , V IH 3-STATE 5.5
r 0.25
r 5.0
r 2.5
P A
V I V CC , V GND Current
V O V CC , GND I OLD Minimum Dynamic 5.55075mA V OLD 1.65V Max I OHD Output Current (Note 4) 5.5 50 75mA V OHD 3.85V Min I CC Maximum Quiescent 5.5
4.0
80.0
40.0
P A
V IN V CC (Note 5)
Supply Current
or GND
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74A C 244 ? 74A C T 244
DC Electrical Characteristics for ACT
Note 6: All outputs loaded; thresholds on input associated with output under test.Note 7: Maximum test duration 2.0 ms, one output loaded at a time.
Symbol Parameter
V CC T A 25q C T A 55q C to 125q C T A 40q C to 85q C
Units Conditions (V)Typ Guaranteed Limits V IH Minimum HIGH Level 4.5 1.5 2.0 2.0 2.0V V OUT 0.1V Input Voltage 5.5 1.5 2.0 2.0 2.0or V CC 0.1V V IL Maximum LOW Level 4.5 1.50.80.80.8V V OUT 0.1V Input Voltage 5.5 1.50.80.80.8or V CC 0.1V V OH
Minimum HIGH Level 4.5 4.49 4.4 4.4 4.4V
I OUT 50 P A Output Voltage
5.5 5.49
5.4 5.4 5.4I OH 12
4.5 3.86 3.70 3.76V
I OH 24 mA 5.5
4.86
4.70 4.76I OH 24 mA (Note 6)V OL
Maximum LOW Level 4.50.0010.10.10.1V
I OUT 50 P A Output Voltage
5.50.001
0.10.10.1I OL 12 mA
4.50.360.500.44V I OL 24 mA
5.5
0.360.500.44I OL 24 mA (Note 6)I IN Maximum Input 5.5r 0.1r 1.0r 1.0P A V I V CC , GND Leakage Current I OZ Maximum 3-STATE 5.5r 0.25
r 5.0r 2.5P A V I V IL , V IH Current V O V CC , GND I CCT Maximum 5.50.6
1.6 1.5mA V I V CC
2.1V I CC /Input
I OLD Minimum Dynamic 5.55075mA V OLD 1.65V Max I OHD Output Current (Note 7) 5.5 50
75mA V OHD 3.85V Min I CC
Maximum Quiescent 5.5
4.080.0
40.0
P A
V IN V CC Supply Current
or GND
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74AC244 ? 74ACT244
AC Electrical Characteristics for AC
Note 8: Voltage Range 3.3 is 3.3V r 0.3V
Voltage Range 5.0 is 5.0V r 0.5V
AC Electrical Characteristics for ACT
Note 9: Voltage Range 5.0 is 5.0V r 0.5V
Capacitance
Symbol Parameter
V CC
T A 25q C T A 55q C to 125q C T A 40q C to 85q C
Units
(V)C L 50 pF
C L 50 pF C L 50 pF (Note 8)Min Typ Max Min Max Min Max t PLH Propagation Delay 3.3 2.0 6.59.0 1.012.5 1.510.0ns Data to Output 5.0 1.5 5.07.0 1.09.5 1.07.5t PHL Propagation Delay 3.3 2.0 6.59.0 1.012.0 2.010.0ns Data to Output 5.0 1.5 5.07.0 1.09.0 1.07.5t PZH Output Enable Time 3.3 2.0 6.010.5 1.011.5 1.511.0ns 5.0 1.5 5.07.0 1.09.0 1.58.0t PZL Output Enable Time 3.3 2.57.510.0 1.013.0 2.011.0ns 5.0 1.5 5.58.0 1.010.5 1.58.5t PHZ Output Disable Time 3.3 3.07.010.0 1.012.5 1.510.5ns 5.0 2.5 6.59.0 1.010.5 1.09.5t PLZ
Output Disable Time
3.3 2.57.510.5 1.013.0 2.511.5ns 5.0
2.0
6.5
9.0
1.0
11.0
2.0
9.5
Symbol Parameter
V CC
T A 25q C T A 55q C to 125q C T A 40q C to 85q C
Units
(V)C L 50 pF
C L 50 pF C L 50 pF (Note 9)Min Typ Max Min Max Min Max t PLH Propagation Delay 5.0
2.0
6.5
9.0
1.0
10.0
1.5
10.0
ns Data to Output t PHL Propagation Delay 5.0
2.0
7.0
9.0
1.0
10.0
1.5
10.0
ns
Data to Output t PZH Output Enable Time 5.0 1.5 6.08.5 1.09.5 1.09.5ns t PZL Output Enable Time 5.0 2.07.09.5 1.011.0 1.510.5ns t PHZ Output Disable Time 5.0 2.07.09.5 1.011.0 1.510.5ns t PLZ
Output Disable Time
5.0
2.5
7.5
10.0
1.0
11.5
2.0
10.5
ns
Symbol Parameter
Typ Units Conditions
C IN Input Capacitance
4.5pF V CC OPEN C PD
Power Dissipation Capacitance
45.0
pF
V CC 5.0V
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74A C 244 ? 74A C T 244
Physical Dimensions inches (millimeters) unless otherwise noted
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
Package Number M20B
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74AC244 ? 74ACT244
Physical Dimensions
inches (millimeters) unless otherwise noted (Continued)
Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M20D
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74A C 244 ? 74A C T 244
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide
Package Number MSA20
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74AC244 ? 74ACT244
Physical Dimensions
inches (millimeters) unless otherwise noted (Continued)
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC20
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74A C 244 ? 74A C T 244 O c t a l B u f f e r /L i n e D r i v e r w i t h 3-S T A T E O u t p u t s
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Package Number N20A
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.LIFE SUPPORT POLICY
FAIRCHILD ’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein:1.Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be rea-sonably expected to result in a significant injury to the user. 2. A critical component in any component of a life support device or system whose failure to perform can be rea-sonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.
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