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湖南大学实时IMDD-OFDM时钟同步

Symbol synchronization and sampling frequency synchronization

techniques in real-time DDO-OFDM systems

Ming Chen a,Jing He a,n,Zizheng Cao a,Jin Tang a,Lin Chen a,Xian Wu b

a Key Laboratory for Micro/Nano Optoelectronic Devices of Ministry of Education,School of Information Science and Engineering,

Hunan University,Changsha410082,China

b School of Computer and Information Technology,Beijing Jiaotong University,Beijing100044,China

a r t i c l e i n f o

Article history:

Received14February2014

Received in revised form

2April2014

Accepted7April2014

Available online21April2014

Keywords:

Symbol synchronization

Sampling frequency synchronization

Orthogonal frequency-division multiplexing

(OFDM)

Real-time signal processing

a b s t r a c t

In this paper,we propose and experimentally demonstrate a symbol synchronization and sampling

frequency synchronization techniques in real-time direct-detection optical orthogonal frequency

division multiplexing(DDO-OFDM)system,over100-km standard single mode?ber(SSMF)using a

cost-effective directly modulated distributed feedback(DFB)laser.The experiment results show that the

proposed symbol synchronization based on training sequence(TS)has a low complexity and high

accuracy even at a sampling frequency offset(SFO)of5000-ppm.Meanwhile,the proposed pilot-assisted

sampling frequency synchronization between digital-to-analog converter(DAC)and analog-to-digital

converter(ADC)is capable of estimating SFOs with an accuracy of o±5-ppm for initial SFOs as large as

1000-ppm.Moreover,the sampling frequency synchronization technique can also compensate SFO

effects within a small residual SFO caused by deviation of SFO estimation and low-precision or unstable

clock source.The two synchronization techniques are suitable for high-speed DDO-OFDM transmission

systems.

1.Introduction

Due to the growing demand for communication bandwidth,the

current wire-and wireless-based access techniques will not meet

the ever-increasing bandwidth requirement.The real-time(RT)

optical OFDM systems have attracted a lot of attention due to its

powerful digital signal processing(DSP),?exible dynamic band-

width allocation and high spectral ef?https://www.sodocs.net/doc/0f7989049.html,pared with

coherent optical OFDM(CO-OFDM),intensity-modulation and

direct-detection optical OFDM(DDO-OFDM)are simpler and cost-

effectiave.Moreover,OFDM-based passive optical network(OFDM-

PON)has been proposed as a key optical access network technique

for the future[1].

The synchronization techniques in OFDM systems are very

important.For the DDO-OFDM system,the synchronization tech-

niques are mainly focused on symbol synchronization and sam-

pling frequency synchronization.A symbol synchronization error

brings about a fraction of a fast Fourier transform(FFT)window to

occur in an extended region of an adjacent symbol,leading to the

degradation of system performance.On the other hand,the

sampling frequency offset(SFO)between the digital-to-analog

converter(DAC)in the transmitter and analog-to-digital converter

(ADC)in the receiver can lead to three different effects:amplitude

reduction,phase rotation of the mapped QAM symbol and inter-

carrier interference(ICI)caused by the loss of orthogonality

between the sub-carriers[2].

For the high-speed optical OFDM system,the data rate is

several orders of magnitude higher than wireless counterpart,

but the state-of-the-art FPGA can only operate at about a few

hundreds megahertz.Instead of the serial data processing,the

parallel algorithm should be considered.Therefore,in order to

achieve a hardware implementation of symbol synchronization

for optical OFDM transmission systems ef?ciently,a novel16-

parallel symbol synchronization method for real-time coherent

optical OFDM system was proposed[3].However,this approach

has less tolerance to inter-symbol interference(ISI).A simple

symbol synchronization technique utilizing subtraction and

Gaussian windowing was proposed and implemented in DD-

OOFDM receiver[4,5].However,it requires a large number of

training symbols and may be not suitable for burst transmission

system.In[6],a simple training sequence(TS)-based symbol

synchronization was proposed for the homodyne coherent

optical receiver.In order to avoid the heavy computation,the

accuracy of this synchronization technique was decreased.In

addition,to reduce or avoid SFO effects,a method was used to

estimate the SFO in the receiver,and then feedback the value to

a voltage controller oscillator(VCO)for eliminating the SFO

effects[5],but this method needs a stable and high-precision

Contents lists available at ScienceDirect

journal homepage:https://www.sodocs.net/doc/0f7989049.html,/locate/optcom

Optics Communications

https://www.sodocs.net/doc/0f7989049.html,/10.1016/j.optcom.2014.04.011

0030-4018/Crown Copyright&2014Published by Elsevier B.V.All rights

reserved.

n Corresponding author.Tel.:+86073188821097.

E-mail address:hnu_jhe@https://www.sodocs.net/doc/0f7989049.html,(J.He).

Optics Communications326(2014)80–87

clock source.A dedicated clock signal was transmitted to the receiver for the sample clock of ADC [7].However,it requires additional circuits,thus the hardware complexity will be increased.Pilot-assisted SFO estimation and compensation algorithm using DSP technique was proposed to reduce SFO effects in wireless OFDM system [8].Unfortunately,the perfor-mance of the algorithm was poor due to the serious ISI or ICI caused by existence of large SFO.

To our best knowledge,there are few synchronization techni-ques for the real-time DDO-OFDM systems.In this paper,we propose a training sequence-based (TS-based)symbol synchroni-zation technique and a pilot symbol-assisted sampling frequency synchronization technique in real-time DDO-OFDM systems using a cost-effective commercial directly modulated distributed feed-back lasers (DFB)with asynchronous clocks in the transmitter and receiver.After 100-km standard single mode ?ber (SSMF)trans-mission,the experiment results show that the proposed symbol synchronization has a low computational complexity without multiplication operations and a high accuracy even at a sampling frequency offset (SFO)of 5000-ppm.In addition,the proposed TS-based technique is suitable for both the burst and continuous transmission system.Meanwhile,the proposed pilot-assisted sam-pling frequency synchronization technique is capable of estimat-ing SFOs with an accuracy of o 75-ppm for initial SFOs as large as 1000-ppm.Moreover,comparing with existing methods [5,7],the proposed sampling frequency synchronization technique can also compensate phase rotation of the received symbol constellation within a small SFO caused by deviation of SFO estimation,low-precision or unstable clock source.Therefore,the technique for sampling frequency synchronization can use a lower-precision clock source to reduce system cost.

2.FPGA-based implementation of real-time base-band OFDM transceiver

Fig.1shows the block diagram of ?eld programmable gate array (FPGA)-based real-time base-band OFDM transmitter and receiver with symbol synchronization and sampling frequency

synchronization techniques.At the transmitter,128sub-carriers are used,of which 104carry information data,8pilot sub-carriers for sampling frequency synchronization,and their indices and values are [à44à33à22à1111223344]and [à111à1à111à1],respectively.The rest are ?lled with zeros.Both a pseudo-random binary sequence (PRBS)pattern and a pseudo-noise (PN)sequence are loaded onto read only memory (ROM)of the FPGA.The PN sequence consists of binary phase shift keying (BPSK)symbols and it can be used to generate the training sequence.A 200-bit parallel bit sequence feeds to 4816-quadrature amplitude modulation (16-QAM)and 4quadrature phase shift keying (QPSK)mappers,which generate complex symbols for half of the data-carrying sub-carriers.Due to the imperfect frequency response of some devices,such as electrical low-pass ?lter,an adaptive modulation technique is used to obtain the optimal transmission performance.16-QAM symbols are mapped to the 48sub-carriers at lower frequency with high signal-to-noise ratio.Meanwhile,QPSK symbols are mapped to the 4sub-carriers at higher frequency with low signal-to-noise ratio.After the pilot symbol insertion,to get a real inverse fast Fourier transform (IFFT)output,all of the data modulated on sub-carriers are constrained to satisfy Hermitian symmetry,with respect to their complex conjugate counterparts.OFDM modula-tion is realized by a 128-point IFFT function [9]with the input and output vector of 16complex data in parallel.The signed real outputs of 128-point IFFT function are scaled and clipped at a clipping ratio of 11.03-dB.A cyclic pre ?x with 16samples is appended to the beginning of every 128IFFT output samples,resulting in OFDM symbol with a size of 144samples.An OFDM frame consists of one training sequence of length 144samples and 256OFDM symbols.16samples per clock cycle are sent to the DAC interface function,in which digital data in two complement formats (signed)is converted to an offset binary data format (unsigned),reorders samples,reorganizes bits and serializes reorganized 16parallel data by two 8:1serializers and then interfaces to the DAC in the correct timing.A DAC with 3-dB bandwidth up to 3-GHz and two 14-bit low voltage differential signal (LVDS)data ports,which supports the maximum

Fig.1.The block diagram of FPGA-based real-time OFDM transceiver.

M.Chen et al./Optics Communications 326(2014)80–8781

conversion rate of 2.5-GSps is used to obtain the base-band analog OFDM signal.The DAC is clocked by the on-board 2.5-GHz clock source.So the net signal bit rate is 3.459-Gbps (200?256/[(144t256?144)?0.4]-Gbps E 3.459-Gbps).A data clock input (DCI)with a frequency of 625-MHz is received from DAC,which is used to generate the operating clock frequency at 156.25-MHz via DAC interface function.

At the receiver,a 10-bit, 2.5-GSps ADC with 3-dB input bandwidth up to 3-GHz is employed to convert the received electrical OFDM signal to a digital one.The ADC interface function receives a data ready clock (DRC)at 625-MHz from ADC.The DRC is used to generate an operating clock for FPGA at a frequency of 156.25-MHz and capture digital data correctly.The high-speed sampled digital signals are ?rst de-multiplexed to 16parallel channels.The next procedure for OFDM is symbol synchronization and it is achieved by using a simpli ?ed TS-based scheme as shown in Fig.2.Once symbol synchronization is done,a cyclic pre ?x of 16samples at the beginning of OFDM symbol is removed.128-point FFT function [9]with 16parallel inputs/outputs is used to realize OFDM demodulation.The TS can also be used to estimate channel response.Note that phase rotation of constellation symbols due to channel response can only be compensated by the channel estimation and compensa-tion function in our receiver.The amplitude response will be considered in de-mapper,i.e.the decision thresholds for our de-mappers can be adjusted dynamically according to estimated amplitude responses [10].In this way,complex division operation for amplitude compensation will be eliminated.To realize sam-pling frequency synchronization between the transmitter and receiver,we propose a pilot-assisted technique to estimate SFO accurately and compensate phase rotation caused by small residual SFOs.To recover transmitted bits at the transmitter,the SFO compensated symbols are sent to 4816-QAM and 4QPSK de-mappers.Then the recovered bits are transmitted to the bit error ratio (BER)calculate function,in which the received bits are synchronized with the transmitted PRBS pattern,and error bits are counted in every OFDM symbol.The ADC captured samples,timing metrics,the outputs of channel estimation and compen-sation,the outputs of SFO phase compensation,bit error count and estimated SFOs are sampled by Xilinx integrated logic analyzer ChipScope,and then transported via Joint Test Action Group (JTAG)cable to host PC with ChipScope analyzer for observation or further analysis.

3.Symbol synchronization and sampling frequency synchronization techniques

3.1.The generation of training sequence and symbol synchronization principle

In this section,we introduce the generation of the TS and simpli ?ed TS-based symbol synchronization technique.In our previous work [10],a TS-based symbol synchronization technique is proposed for long-reach DDO-OFDM transmission systems.However,a common clock source is used to avoid the effects of SFO between DAC in the transmitter and ADC in the receiver.Here,the improved symbol synchronization technique is proposed for DDO-OFDM systems with SFO.

3.1.1.The generation of training sequence

The training sequence is generated by modulating the odd sub-carriers (excluding the sub-carriers at the high frequencies)with BPSK symbols,while the even sub-carriers and the sub-carriers at high frequencies are ?lled with zeros.All of data (BPSK symbols and zeros)on the sub-carriers are constrained to have Hermitain symmetry,and then the result of IFFT will produce the real-valued time-domain sequence as show in Eq.(1).A cyclic pre ?x is appended on the inverse discrete Fourier transform (IDFT)output to cope with inter-symbol interference (ISI).The samples of the proposed TS are designed to be of the form as W pro ??C N =4D N =4àC N =4àD N =4

e1T

where N is the size of IFFT.C N =4and D N =4are real.C N =4represents samples of length generated by IFFT of a real-valued PN sequence that is mentioned above.To obtain impulse-shaped timing metric,D N =4is designed to be symmetric with C N =4.

3.1.2.A simpli ?ed TS-based symbol synchronization technique

The basic form of proposed TS is similar to Park's method [12].Therefore,Park's timing metric function for symbol synchroniza-tion can also be applied to the proposed TS.However,in Ref.[13],it shows that a cross-correlation algorithm can provide better performance at low SNR due to the averaging process of the correlator.Thus,the cross-correlation property of TS is used to calculate timing metric function instead of auto-correlation prop-erty.The timing metric is expressed as

M ed T?P ed T 2

R ed T

e2Twhere

P ed T?∑N t à1

n ?0t en Tr en td T

e3T

R ed T?∑N t à1n ?0r en td T2e4T

where t en Tis the transmitted training sequence of length N t ?N tN cp ,N cp is the length of cyclic pre ?x.r en Tis the received signal.

The performance of the TS-based symbol synchronization in off-line OFDM receiver is experimentally demonstrated in Refs.[11,14].However,to generate the timing metric according to Eqs.(2)–(4),it will involve a heavy computation including N t multiplication operations and N t à1addition operations.Gener-ally,the parallel DSP technique is needed to be used to reduce the operating frequency of FPGA to several hundred megahertz.For a N p -parallel channel receiver,the complexity of the symbol syn-chronization will increase dramatically with N t N p

multiplication

Fig.2.The maximum timing metric versus sampling phase offset (IFFT length:128,CP length:16,Ts is sample period).

M.Chen et al./Optics Communications 326(2014)80–87

operations and eN t à1TN p addition operations at a signi ?cant hardware cost.

To reduce the hardware cost and consider the effects of sampling clock offset,a simpli ?ed and improved TS-based symbol synchronization approach is proposed.Instead of multiplication operations in Eqs.(2–4),only the sign bit of ADC captured sample is extracted to realize the synchronization with simple XNOR and bit summation operations.The timing metric is de ?ned as

M Pro ed T?P ed TtP ed à1T;P ed T4V

P ed T;P ed Tr V (

e5T

where

P ed T?∑N t à1

n ?0sign ?t en T sign ?r en td T

z?????????????????????????????}|?????????????????????????????{

The number of sign ?t en T ?sign ?r en td T

àN t à∑N t à1

n ?0sign ?t en T sign ?r en td T

z??????????????????????????????????}|??????????????????????????????????{The number of sign ?t en T a sign ?r en td T

?2∑N t à1

n ?0

sign ?t en T sign ?r en td T àN t

e6T

where sign ?U stands for sign bit extractor.As the input is a

positive number,the output is bit '0';otherwise the output is bit '1'. is the XNOR operator.

The SFO-caused sampling phase offset (SPO)for every TS will affect the performance of symbol synchronization utilizing cross-corelation property.To investigate the effect,a highly over-sampled OFDM signal with an over-sampling rate of 32is ?rst generated.Then the OFDM signal with different SPOs in a fraction of the sample period Ts can be obtained from it.For simplicity,the effect of SPO only is considered in the numerical simulation.The parameters for OFDM signal is the same as real-time ones.The maximum values of P ed Tand M Pro ed Tversus SPOs are shown in Fig.2.The simulated result shows that both Max ?P ed T and Max ?M Pro ed T varies over SPOs,but the M Pro ed Thas a stronger peak for the symbol synchronization than P ed T.To improve symbol synchronization performance,the timing metric M Pro ed Tis the sum of P ed Tand P ed à1T,as P ed Tis larger than a threshold value V ,and is chosen as the proposed timing metric.The correct timing location is determined by comparing the timing metric M Pro ed Twith a threshold value Th.Note that the V is usually less than Th and used to obtain the optimal M Pro ed T.

Fig.3shows the digital signal processing ?ows of symbol synchronization for k th parallel channel.The sign bits of N t samples in N p parallel channels are ?rst extracted,and then the k th cross-correlator can be implemented according to Eq.(6).Among the cross-correlator,multiplying by a power of 2,the multiplication operation can be simpli ?ed as a single bit shift operation.Thus,for the proposed simpli ?ed TS-based symbol synchronization technique,according to Eqs.(5)and (6),there are only N p N t -bit XNOR operations,N p eN t t1Taddition operations and N p bit shift operations for the timing metric M Pro ed Tcalcula-tion utilizing parallel signal processing.Moreover,N t -bit summa-tion in each cross-correlator can also further save hardware

resources and reduce complexity of https://www.sodocs.net/doc/0f7989049.html,pared

with the symbol synchronization techniques in [4–6],our pro-posed synchronization technique is also of low complexity for the high-speed DDO-OFDM system.If the condition M Pro ed T4Th is satis ?ed,then the samples in N p parallel channels are reorganized for the remove CP function to realize symbol synchronization.In order to eliminate small ICI effect caused by the existence of symbol synchronization offset from SPO,the Q th sample before the correct timing position is regarded as the starting point of OFDM frame.

3.2.Sampling frequency synchronization with SFO-caused phase compensation

A pilot-assisted SFO estimation and compensation algorithm [8]can well compensate the effects of small SFOs through skip or repeat operations of ADC,or shift the starting point for forming the OFDM symbol using DSP technique.However,the existence of serious ICI from the large SFOs will lead to the degradation of system performance.The modi ?ed pilot-assisted sampling fre-quency synchronization with phase compensation is proposed to achieve a good performance even under large SFOs.The pilot-assisted synchronization technique can compensate phase rota-tions from a small residual SFO caused by an unstable clock source or deviation of SFO estimation.Meanwhile,it can use the low-precision VCO at the receiver.Thus,the cost of system will be reduced further.

3.2.1.Phase estimation and compensation

Assuming that symbol synchronization and channel equaliza-tion are completed,the residual phase terms on all data sub-carriers can be estimated by half of the pilot symbols because the input/output vector of the IFFT/FFT is Hermitian symmetry in the OFDM transceiver.

For an N point's IFFT/FFT-based OFDM system,the index range of sub-carriers is ?àN =2t1;N =2 .The residual phase term of the pilot symbol is given by

^φ

nk i ?arg f y nk i =x nk i g ;i ??1;2;?;M ;k i A P e7T

where M is the number of the pilot symbols,P is the indices of the

sub-carriers which transmitted M pilot symbols,^φ

nk i is the estimated phase rotation of the pilot symbol whose sub-carrier index is k i in the n th OFDM symbol.arg U f g stands for the angle operator,x nk i and y nk i are transmitted and received pilot symbols,respectively.A least square solution [15]is applied to obtain

the estimated slope ^s

n of a linear ?tting curve by using these Fig.3.Digital signal processing block diagram of symbol synchronization for k th parallel channel.

Fig.4.Block diagram of the sampling frequency synchronization scheme.

M.Chen et al./Optics Communications 326(2014)80–8783

M =2points,(k i ,^φ

nk i ),where all of k i are positive (or negative)values only.

n ?∑M =2

i ?1k i ^φnk i ∑M =2i ?1

k i

,e8T

With the estimate of ^s

n available,the phase shift due to SFO for all sub-carriers can be estimated.For the small SFO cases,all information-bearing data on the sub-carrier of n th OFDM symbol

will be compensated by multiplying a factor,exp àjk ^s

n àá,where k is the index of the data sub-carrier.

3.2.2.SFO estimation and sampling frequency synchronization principle

For the large SFO cases,the introduced ICI will seriously degrade the system performance.In this section,the SFO will be estimated,and then be used to realize sampling frequency synchronization.The theoretical slope of n th OFDM symbol can be approximated as [8]

s n ?2πnN t ΔT =N ?à2πnN t Δf =e1tΔf TN

e9T

where Δf is a relative clock frequency offset and ΔT ?àΔf =1tΔf is the relative difference in periods.Since Δf is much small than 1,Eq.(9)can be expressed as s n ?à2πnN t Δf =N

e10T

Again,Δf can be given by Δf ?à

N t s n e11TIn our proposed synchronization technique,the estimated slope ^s

n is also used to estimate the SFO.The estimated SFO can be expressed as ^Δ

f ?àN

t ∑

D n ?1^s n e12T

where D is the number of estimated slope ^s

n .After the averaging processing based on Eq.(12),the estimated SFO can be used to generate a synchronization signal.In this way,it can control the output frequency of a VCO in the receiver to realize the sampling frequency synchronization.

Fig.4shows a block diagram of the proposed sampling frequency synchronization scheme.The M /2pilot symbols ?rst are extracted from the channel equalized signal;the residual phases on the pilot symbols are estimated according to Eq.(7),using a COordinate Rotation DIgital Computer (CORDIC)algorithm

in vectoring mode.Based on Eq.(8),the slope parameter ^s

n is obtained to generate phases,and it can be utilized to compensate the phase rotations of symbols on the data-carrying sub-carriers.Meanwhile,it can estimate SFOs to realize sampling frequency synchronization.It should be noted that,the phase compensation is achieved using the CORDIC algorithm in rotation mode.

4.Experiment setup and results 4.1.Experimental setup

The real-time FPGA-based DDO-OFDM transmission system is shown in Fig.5.The digital OFDM signal is converted by a DAC with 2.5-GSps sample rate.The output analog OFDM signal with a peak-to-peak voltage (V p-p)of about 700-mV ?rst is ampli ?ed to 2-V p-p by a variable electrical ampli ?er (VEA).A single-mode 1549.9-nm directly modulated commercial distributed

feedback

Fig.5.Experimental setup and power spectral density of the received OFDM

signal.

Fig.6.The timing metric for symbol synchronization technique.

M.Chen et al./Optics Communications 326(2014)80–87

(DFB)laser is driven by the ampli ?ed electrical OFDM signal.The optical power fed into SSMF is à1.8-dBm through adjusting bias of the DFB.After SSMF transmissions,an erbium-doped ?ber ampli-?er (EDFA)is used to boost the optical power of OFDM signal up to

6.4-dBm at the receiver.Before the photoelectric conversion,the power of detected optical OFDM signal can be changed by a variable optical attenuator (VOA).The received base-band OFDM signal can be obtained via a photo-detector (PD)with a bandwidth of 10-GHz.An anti-aliasing ?lter with a 3-dB bandwidth of 1.1-GHz is used to avoid aliasing at the ADC.The samples captured by a 2.5-GSps ADC are sent to FPGA for real-time DSP.For our proposed symbol synchronization technique,Q ,the threshold V and Th are 2,70and 120,respectively.The above-mentioned internal FPGA signals are observed in real-time.To investigate the performance of the proposed sampling frequency synchronization technique,an external variable frequency clock source for the ADC is utilized to obtain the digital OFDM signal with different SFOs.

The power spectral density of the ADC captured OFDM signal is shown in Fig.4.It can be seen clearly that the power attenuation at the highest-frequency sub-carrier is greater than 10-dB.This effect is mainly attributed to the effect of sinc roll-off in the DAC,imperfect responses of the low-pass ?lter and analog front end of the ADC.To achieve a good transmission performance,an adaptive modulation technique is employed in our real-time system.

4.2.Symbol synchronization

After 50-km SSMF transmission with a SFO of 5000-ppm,the real-time measured timing metric of three continuous

OFDM

Fig.7.BER versus SFO with or without phase

compensation.

Fig.8.Constellations of 16-QAM and QPSK with a SFO of 30-ppm:(a),(b)before phase compensation and (c),(d)after phase compensation.

M.Chen et al./Optics Communications 326(2014)80–8785

frames is shown in Fig.6.Three strong peaks of the timing metric are obvious and the shape of them is very sharp,signifying that the estimation of the start point in each OFDM frame is accurate even at a large SFO.It is suitable for both the burst and continuous transmission system.

4.3.FO-caused phase compensation and SFO estimation

Fig.7shows that the relationship between BER and SFO with or without phase compensation caused by SFO.As we can see,the BER performance without phase compensation is degraded dra-matically.However,at a BER of 1e à4,the proposed sampling frequency synchronization technique can compensate more than 30-ppm SFO effects only by phase compensation.It indicates that the VCO is used to synchronize the sampling frequency.Mean-while,it can be allowed to have a low-precision and lower stability.Moreover,it can also compensate the small residual SFO after sampling clock frequency synchronization due to esti-mated SFO deviation.It should be noted that the BER performance with phase compensation is gradually degraded since the output angle of the CORDIC algorithm is limited to the range of [àπ,π].To avoid this problem,the estimated phase error of the CORDIC algorithm is needed to be corrected.However,the serious ICI

introduced by the large SFO is a major issue to be considered.At this time,we can delimitate SFO effects through sampling frequency synchronization via a VCO.

The constellations of 16-QAM on the 31st sub-carrier and QPSK on the 56th sub-carrier with a SFO of 30-ppm is shown in Fig.8.The constellations before and after phase compensation are shown in Fig.8(a,b)and (c,d),respectively.It shows that the proposed sampling frequency synchronization technique is capable of phase compensation caused by a small SFO.

The SFO estimation performance in a 3.459-Gbps 50-km SSMF transmission system is shown in Fig.9.It is shown that the estimated SFO is very close to the real SFO values up to 3000-ppm within a deviation of 750-ppm,and the proposed SFO estimation technique is capable of estimating SFOs with an accuracy of o 75-ppm for initial SFOs as large as 71000-ppm.In addition,when the real SFO is close to 0-ppm,the accuracy of the estimated SFO is o 71-ppm.

4.4.Transmission performance of the end-to-end real-time DDO-OFDM system

According to the estimated SFO,the SFO can be set to be 0-ppm by adjusting the external variable frequency clock source in the receiver in the initial stage of establishing a connection between transmitter and receiver.The real-time measured BER perfor-mances over 20-km,50-km,and 100-km SSMF transmissions and a total of 52,428,800bits versus received optical power is shown in https://www.sodocs.net/doc/0f7989049.html,pared with the back-to-back (OBTB)case,at a BER of 1e à3,the power penalty after 20-km,50-km and 100-km SSMF transmissions are 0.35-dB,0.65-dB and 3.67-dB,respectively.As shown in Fig.10,the deteriorated BER performance after 100-km SSMF transmission is mainly attributed to the walk-off effect [16–19]caused by ?ber dispersion.In addition,it is well known that laser phase noise can be converted to relative intensity noise (RIN)by ?ber dispersion,and laser RIN will increase with the increasing of the transmitted ?ber length.

5.Conclusion

In this work,a 3.459-Gbps real-time DDO-OFDM system with adaptive modulation technique,TS-based symbol synchronization technique and pilot-assisted sampling frequency synchronization technique over 20-km,50-km and 100-km SSMF transmissions employing a directly modulated DFB laser is experimentally demonstrated.The experimental results show that the proposed symbol synchronization technique has a low complexity and high accuracy.Meanwhile,the proposed sampling frequency synchro-nization is capable of estimating SFOs with an accuracy of o 75-ppm for initial SFOs as large as 71000-ppm,and compensating the residual small SFO effects caused by the low-precision and unstable VCO or deviation of SFO estimation.The proposed two synchronization techniques are suitable for high-speed DDO-OFDM transmission systems.

Acknowledgment

This work is supported by the National Natural Science Foun-dation of China (61307087,61377079),by the Hunan Provincial Natural Science Foundation of China (12JJ3070),by the National “863”High Tech Research and Development Program of China (2011AA010203),by the Open Fund of State Key Laboratory of Information Photonics and Optical Communications (Beijing University of Posts and Telecommunications)and by

the

Fig.9.SFO estimation

performance.

Fig.10.The real-time measured BER performance.

M.Chen et al./Optics Communications 326(2014)80–87

Fundamental Research Funds for the Central Universities and Young Teachers Program of Hunan University.

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时间同步系统的要求

4.3.12时间同步系统的要求 4.3.12.1总的要求 4.3.12.1.1 时间同步系统的构成 1）时间同步系统由一级主时钟和时钟扩展装置组成。 2）一级主时钟用于接收卫星或上游时间基准信号，并为各时间扩展装置提供时间信号。3）一级主时钟与时钟扩展装置均配置时间保持单元，保证在输入信号中断的情况下，依然不间断地提供高精度的输出信号。 4.3.12.1.2时间同步系统的布置根据本期工程情况，将配置1面主时钟装置屏和2面时钟扩展装置屏。主时钟本体装置屏安装在集控楼内，主时钟屏配置的2台主时钟为整个时间同步系统提供2路冗余的时间基准信号输出。机组保护室和网络继电器室各设1面时钟扩展装置屏，主时钟装置与时钟扩展装置之间采用光纤连接。时间同步系统天线安装在集控楼楼顶上。 4.3.12.1.3时间同步系统的运行条件 1）电源要求同步时钟装置（一级主时钟和二级扩展）采用两路AC220V电源供电，投标方应配置双电源自动切换装置（美国ASCO 7000系列产品）实现双电源自动切换。 2）工作环境工作温度： -10～+55℃ 贮存温度: -40～+55℃ 湿度： 5%~95%（不结露）。所有设备均可放置在无屏蔽、无防静电措施的机房内。 4.3.12.1.4 时间同步系统的电磁兼容性时间同步系统在集控楼的电磁场环境下能正常工作，符合“GB/T13926-1992 工业过程测量和控制装置的电磁兼容性”中有关规定的要求，并达到Ш级及以上标准。 4.3.12.2功能要求 4.3.12.2.1 时间同步系统配置的主时钟及时间同步信号扩展装置对厂内DCS、SIS、电气控制装置及其他需要时钟同步的设备进行时间同步，并应能提供满足这些设备需要的各种时间同步信号及接口(含接口装置、通讯电缆等设备)。 4.3.12.2.2时间同步系统两台主时钟的时间信号接收单元应能独立接收GPS卫星和我国北斗卫星发送的无线时间信号作为主外部时间基准信号。当某一主时钟的时间接收单元发生故

胸痛中心时钟统一方案

丹阳市人民医院胸痛中心的时间管理方案一、时钟同步系统时钟同步系统对于医院系统可以说是一个不可缺少的重要组成部分，其主要作用是为相关医医疗机构工作人员提供一个标准统一的时间信息，同时为各相关单位科室提供统一的标准时间系统同步，从而实现各相关单位及相关设备的时间标准统一。这对医院的服务质量起到了重要的作用。时钟同步系统工作原理是相关责任人手持移动终端接收3G基站时间信息来实现统一；所有相关设备均以此为标准校对，从而实现全系统统一的时间标准。并每周校对一次。二、计时点及方法 1.发病时间：患者出现胸痛、胸闷、上腹不适等系列症状开始的时间 ·计时方法：主要是通过问诊方式获得 2.呼救时间：首次拨打120呼救或拨打医院急救电话求救 ·计时方法：120记录、本院胸痛中心记录或其他急救机构记录，已接听电话的时刻为准。 3.到达现场时间：院前急救人员、社区医生或其他医疗机构到达现场时间计时方法：要求院前人员、网络医院、其他医疗机构准确计时 4.首份心电图时间：完成第一份12或18导联心电图的时间计时方法：开始接触医疗人员到完成第一份心电图最后一个导联记录为准。在完成心电图操作后，应将准确时间记录在心电图上，包括年、月、日、时、分5.确诊STEMl时问：完成首份心电图后，由受过胸痛专科培训的医生或分诊护士确认为STEMI时间；或由我院医师使用胸痛中心微信群诊断为STEMI的时间。 6.抽血时间：首次抽血查Tnl、CKMB等的时间计时方法：以抽血护士完成标本采集时刻为计时点。 7.开始转运时间：在确诊为ACS并离开现场／医院的时间。 . 计时方法：由转运医护人员在接到病人启动车辆时计时 8. 给药时间：在确定为ACS患者，排除各类用药禁忌症后，给予服用肠溶阿司

时间同步系统在线监测可行性研究报告

附件4 甘肃电网智能调度技术支持系统时间同步系统在线监测技术改造（设备大修）项目可行性研究报告模板项目名称：项目单位：编制：审核：批准：编制单位：设计、勘测证书号：

年月日

1．总论时间同步系统在线监测功能，将时钟、被授时设备构成闭环，使对时状态可监测，且监测结果可上送，从而将时间同步系统纳入自动化监控系统管理。时间同步系统在线监测的数据来源分为两大类：设备状态自检数据和对时状态测量数据。设备状态自检主要是被监测设备自身基于可预见故障设置的策略，快速侦测自身的故障点。对时状态测量则是从被监测设备外部对其自身不可预见的故障产生的结果进行侦测，这两种方法较为完整的保证了时间同步系统监测的性能和可靠性。 1．1设计依据 2013年4月，国调中心专门下发了〔2013〕82号文《国调中心关于加强电力系统时间同步运行管理工作的通知》 1．2主要设计原则通过在原系统上建立一套通讯技术及软件来实现系统级的时间同步状态在线监测功能。采用低建设成本、低管理成本、低技术风险的手段，解决当前自动化系统时间同步体系处于开环状态，缺乏反馈，无法获知工作状态紧迫现状，使时钟和被对时设备形成闭环监测，减少因对时错误引起的事件顺序记录无效，甚至导致设备死机等运行事故，并在此前提下尽可能的提高监测性能，减少复杂度。

1．3设计水平年系统模块使用年限10年。 1．4设计范围及建设规模智能调度技术支持系统（主站）针对时钟同步检测功能修改主要涉及前置应用，前置应用以104 或476 规约与变电站自动化系进行过乒乓原理对时，根据对时结果来检测各变电站时钟对时的准确性，从而保证全网时钟同步的准确性。同时，以告警直传方式接收变电站时间同步监测结果，包含设备状态自检数据和对时状态测量数据。 1．5主要技术经济指标 1．6经济分析 2．项目必要性 2．1工程概况智能电网调度技术支持系统及各变电站都以天文时钟作为自己的时间源，正常情况下实现了全网时间的一致。 2．2存在主要问题近期，电力系统时间同步装置在运行中发现的时钟异常跳变、时钟源切换策略不合理及电磁干扰环境下性能下降等问题，反映出电力系统时间同步在运行管理、技术性能、检验检测管理、在线监测手段及相关标准等方面仍需进一步完善和加强。

网络时钟系统方案

时钟系统技术方案烟台北极星高基时间同步技术有限公司 2012 年 3 月第一部分：时钟系统技术方案一、时钟系统概述 1. 1 概述根据办公楼的实际情况，特制定如下施工设计方案：时钟系统主要由GPS接收装置、中心母钟、二级母钟（中继器）、全功能数字显示子钟、、传输通道和监测系统计算机组成。系统中心母钟设在中心机房内，其他楼各设备间设置二级母钟，在各有关场所安装全功能数字显示子钟。系统中心母钟接收来自GPS的标准时间信号，通过传输通道传给二级母钟，由二级母钟按标准时间信号指挥子钟统一显示时间；系统中心母钟还通过传输系统将标准时间信号直接传给各个子钟，为楼宇工作人员提供统一的标准时间二、时钟系统功能根据本工程对时钟系统的要求，时钟系统的功能规格如下：时钟系统由GPS校时接收装置（含防雷保护器）、中心母钟、扩容接口箱、二级母钟、数字式子钟、监控终端（也称监测系统计算机）及传输通道构成。其主要功

能为：。显示统一的标准时间信息。。向其它需要统一时间的系统及通信各子系统网管终端提供标准时间信息。 2.1 中心母钟系统中心母钟设置在控制中心设备室内，主要功能是作为基础主时钟，自动接收GPS勺标准时间信号，将自身的精度校准，并分配精确时间信号给子钟，二级母钟和其它需要标准时间的设备，并且通过监控计算机对时钟系统的主要设备进行监控。中心母钟主要由以下几部分组成：。标准时间信号接收单元。主备母钟（信号处理单元）。分路输出接口箱。电源中心母钟外观示意图见（附图） 2.1.1 标准时间信号接收单元标准时间信号接收单元是为了向时间系统提供高精度的时间基准而设置的，用以实现时间系统的无累积误差运行。在正常情况下，标准时间信号接收单元接收来自GPS的卫星时标信号，经解码、比对后，经由RS422接口传输给系统中心母钟，以实现对母钟精度的校准。

网络时钟系统方案

时钟系统技术方案烟台北极星高基时间同步技术有限公司 3月

第一部分：时钟系统技术方案一、时钟系统概述 1.1概述根据办公楼的实际情况，特制定如下施工设计方案：时钟系统主要由GPS接收装置、中心母钟、二级母钟(中继器)、全功能数字显示子钟、、传输通道和监测系统计算机组成。系统中心母钟设在中心机房内，其它楼各设备间设置二级母钟，在各有关场所安装全功能数字显示子钟。系统中心母钟接收来自GPS的标准时间信号，经过传输通道传给二级母钟，由二级母钟按标准时间信号指挥子钟统一显示时间；系统中心母钟还经过传输系统将标准时间信号直接传给各个子钟，为楼宇工作人员提供统一的标准时间二、时钟系统功能根据本工程对时钟系统的要求，时钟系统的功能规格如下：时钟系统由GPS校时接收装置（含防雷保护器）、中心母钟、扩容接口箱、二级母钟、数字式子钟、监控终端（也称监测系统计算机）及传输通道构成。其主要功能为： ☉显示统一的标准时间信息。 ☉向其它需要统一时间的系统及通信各子系统网管终端提供标准时间信息。

2.1 中心母钟系统中心母钟设置在控制中心设备室内，主要功能是作为基础主时钟，自动接收GPS的标准时间信号，将自身的精度校准，并分配精确时间信号给子钟，二级母钟和其它需要标准时间的设备，而且经过监控计算机对时钟系统的主要设备进行监控。中心母钟主要由以下几部分组成： ☉标准时间信号接收单元 ☉主备母钟（信号处理单元） ☉分路输出接口箱 ☉电源中心母钟外观示意图见（附图） 2.1.1标准时间信号接收单元标准时间信号接收单元是为了向时间系统提供高精度的时间基准而设置的，用以实现时间系统的无累积误差运行。在正常情况下，标准时间信号接收单元接收来自GPS的卫星时标信号，经解码、比对后，经由RS422接口传输给系统中心母钟，以实现对母钟精度的校准。系统经过信号接收单元不断接收GPS发送的时间码及其相关代码，并对接收到的数据进行分析，判断这些数据是否真实可靠。如果数据可靠即对母钟进行校对。如果数据不可靠便放弃，下次继续接收。 2.1.2主备母钟

时钟同步系统施工方案

施工方案审批表审核单位：审核意见：审核人：日期：监理单位：监理意见：监理人：日期：批准单位：审批意见：审批人：日期：

目录一、施工方案综述............................................................................................... - 3 - 二、工程概况及特点........................................................................................... - 4 - 三、施工步骤....................................................................................................... - 5 - 四、风险分析..................................................................................................... - 14 - 五、生产安全及文明施工................................................................................. - 14 - 一、施工方案综述根据中韩（武汉）石油化工有限公司PLC系统的改造技术要求和我公司对改造要求的理解来编制施工方案。

GPS时钟同步系统在网络系统中的技术方案

前言随着计算机和网络通信技术的飞速发展，火电厂热工自动化系统数字化、网络化的时代已经到来。这一方面为各控制和信息系统之间的数据交换、分析和应用提供了更好的平台、另一方面对各种实时和历史数据时间标签的准确性也提出了更高的要求。使用价格并不昂贵的GPS时钟来统一全厂各种系统的时钟，已是目前火电厂设计中采用的标准做法。电厂内的机组分散控制系统(DCS)、辅助系统可编程控制器(PLC)、厂级监控信息系统(SIS)、电厂管理信息系统(MIS)等的主时钟通过合适的GPS时钟信号接口，得到标准的TOD(年月日时分秒)时间，然后按各自的时钟同步机制，将系统内的从时钟偏差限定在足够小的范围内，从而达到全厂的时钟同步。一、GPS时钟及输出 1.1 GPS时钟全球定位系统(Global Positioning System，GPS)由一组美国国防部在1978年开始陆续发射的卫星所组成，共有24颗卫星运行在6个地心轨道平面内，根据时间和地点，地球上可见的卫星数量一直在4颗至11颗之间变化。 GPS时钟是一种接受GPS卫星发射的低功率无线电信号，通过计算得出GPS时间的接受装置。为获得准确的GPS时间，GPS时钟必须先接受到至少4颗GPS 卫星的信号，计算出自己所在的三维位置。在已经得出具体位置后，GPS时钟只要接受到1颗GPS卫星信号就能保证时钟的走时准确性。作为火电厂的标准时钟，我们对GPS时钟的基本要求是：至少能同时跟踪8颗

卫星，有尽可能短的冷、热启动时间，配有后备电池，有高精度、可灵活配置的时钟输出信号。 1.2 GPS时钟信号输出目前，电厂用到的GPS时钟输出信号主要有以下三种类型： 1.2.1 1PPS/1PPM输出此格式时间信号每秒或每分时输出一个脉冲。显然，时钟脉冲输出不含具体时间信息。 1.2.2 IRIG-B输出 IRIG(美国the Inter-Range Instrumentation Group)共有A、B、D、E、G、H几种编码标准(IRIG Standard 200-98)。其中在时钟同步应用中使用最多的是IRIG-B编码，有bc电平偏移(DC码)、1kHz正弦载波调幅(AC码)等格式。IRIG-B 信号每秒输出一帧(1fps)，每帧长为一秒。一帧共有100个码元(100pps)，每个码元宽10ms，由不同正脉冲宽度的码元来代表二进制0、1和位置标志位(P)，见图1.2.2-1。为便于理解，图1.2.2-2给出了某个IRIG-B时间帧的输出例子。其中的秒、分、时、天(自当年1月1日起天数)用BCD码表示，控制功能码(Control Functions，CF)和标准二进制当天秒数码(Straight Binary Seconds Time of Day，SBS)则以一串二进制“0”填充(CF和SBS可选用，本例未采用)。 1.2.3 RS-232/RS-422/RS-485输出此时钟输出通过EIA标准串行接口发送一串以ASCII码表示的日期和时间报文，每秒输出一次。时间报文中可插入奇偶校验、时钟状态、诊断信息等。此输出目前无标准格式，下图为一个用17个字节发送标准时间的实例：

XP系统时间同步解决方案

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1．3设计水平年系统模块使用年限10年。 1．4设计范围及建设规模智能调度技术支持系统（主站）针对时钟同步检测功能修改主要涉及前置应用，前置应用以104 或476 规约与变电站自动化系进行过乒乓原理对时，根据对时结果来检测各变电站时钟对时的准确性，从而保证全网时钟同步的准确性。同时，以告警直传方式接收变电站时间同步监测结果，包含设备状态自检数据和对时状态测量数据。 1．5经济分析时间同步系统在线监测功能将时间同步装置、时间源服务器和被授时设备构成闭环，使对时状态可监测，且监测结果可上送，从而将时间同步系统纳入自动化监控系统管理。提高电力系统时间同步的准确性，保障电力系统运行控制和故障分析的重要基础。后期经济效益明显 2．项目必要性 2．1工程概况智能电网调度技术支持系统及各变电站都以天文时钟作为自己的时间源，正常情况下实现了全网时间的一致。 2．2存在主要问题

同步时钟系统

同步时钟系统 1.公司简介南瑞集团公司是国家电网公司直属单位，是中国最大的电力系统自动化、水利水电自动化、轨道交通监控技术、设备和服务供应商。主要从事电力系统二次设备、信息通信、智能化中低压电气设备、发电及水利自动化设备、工业自动化设备、非晶合金变压器及电线电缆的研发、设计、制造、销售、工程服务与工程总承包业务。南瑞集团通信与用电技术分公司（以下简称“通信用电分公司”）成立于2010年1月，是南瑞集团公司信息通信产业板块的核心单位、国内领先的高端智能用电产品及整体解决方案提供商，为国家电网公司提供各类智能芯片产品。通信用电分公司充分把握智能用电产业发展的重大历史机遇，以服务坚强智能电网建设为主旨，以做专做精做大做强“智能用电产业”为目标，积极贯彻落实国家电网公司直属产业规划部署，确立了“1+5”发展战略，打造“1”个产业支撑平台，支撑“智能芯片、智能终端、智能传感、电力通信和智能服务”5项业务协同发展，形成从应用系统层、终端设备层和芯片器件层相互支撑的业务发展格局，致力于成为以芯片为核心支撑的高端综合解决方案提供商，已形成了信息管理、通信系统及通信设备、智能芯片、用电自动化及终端设备、电力物联网等5个产品线，拥有17个子产品线。随着生产业务的拓展，通信用电分公司已经取得一批具有自主知识产权的产品及成果,包括：“国网芯”系列芯片及与之配套的芯片发行系统、密钥管理系统；基于“国网芯”技术的智能用电产品及终端模块、电力线载波通信及配用电专用光通信产品；基于智能量测技术的智能防窃电系统、省级计量中心计量生产调度平台、智能感知互动综合服务平台等，并积极拓展节能服务、能效及智能传感等新型营销业务。通信用电分公司成立3年来，各项经营业绩指标均保持迅猛增长，已承担多项重点科研和产业化项目，申请专利及软件著作权145项（其中发明专利66项），申请国际专利4项，截至2013年6月底，人员规模已从成立之初的83人

NTP时钟同步方案

NTP时钟同步系统技术方案

目录目录 (2) 一、系统技术规范 (3) 二、时钟系统设计 (5) 1、概述 (5) 1.1、系统特点 (5) 1.2、优化后的时钟同步系统具有以下优势 (5) 2、系统设计原则 (5) 2.1、安全性、可靠性 (6) 2.2、经济合理性 (6) 2.3、先进性、成熟性、可持续性 (6) 2.4、标准性、开放性、互联互通性 (6) 2.5、可用性 (6) 2.6、可兼容性和可扩充性 (7) 2.7、抗干扰性 (7) 2.8、环保低功耗 (7) 2.9、制造工艺规范化 (7) 2.10、设备管理集中化 (7) 3、时钟同步系统架构 (7) 3.1、方案优化的必要性 (7) 3.2、时钟同步系统优化方案 (8) 3.3、时钟同步系统原理 (9) 3.4、工作原理 (9) 4、系统设备结构 (10)

一、系统技术规范系统所遵循的国际、国家、行业及企业标准包括： GBJ42-81《工业企业通信设计规范》 GBJ79-85《工业企业通信接地设计规范》 GB/T 4857.1-92《包装运输包装件试验时各部位的标示方法》 GB 3873-83《通信设备产品包装通用技术条件》 GB 50174-93《电子计算机机房设计规范》 GB50807-86《设备可靠性试验规范》 GB 50254-96《电气装置安装工程施工及验收规范》 GB 50311-2007《综合布线系统工程设计规范》 YD/T 1012-1999《数字同步网节点时钟系列及其定时特性》 JGJ/T 16-92《民用建筑电气设计规范》 YD/T 5089-2005《数字同步网工程设计规范》 YD/T 5027-2005《通信电源集中监控系统工程设计规范》 YD 5098-2005《通信局（站）防雷与接地工程设计规范》 YD/T5120-2005《无线通信系统室内覆盖工程设计规范》 GA/T331-2001《公安移动通信网警用自动级通信系统工程设计技术规范》电磁兼容和防雷设计相关标准包括： IEC61000-6-2《工业环境中发射标准》 IEC61000-6-4《工业环境中抗扰度》 IEC61000-4-2《静电放电抗扰度试验》 IEC61000-4-3《射频电磁场辐射抗扰度试验》 IEC61000-4-4《电快速瞬变脉冲群抗扰度试验》 IEC61000-4-5《浪涌（冲击）抗扰度试验》 IEC61000-4-6《射频场感应的传导骚扰抗扰度》 IEC CISPR 22 1997《信息技术设备的无线电干扰限值和测量方法》 GB50057-94《建筑物防雷设计规范》 IEC61312-95《雷电电磁脉冲的防护》 YD5068-98《移动通信基站防雷与接地设计规范》

智能变电站时间同步系统

智能变电站时间同步系统摘要随着智能电网的全面发展，并实现电网的信息化、数字化、自动化、互动化，网络智能接点的正常工作和作用的发挥，离不开统一的时间基准。【关键词】时间同步智能变电站时间同步系统为我国电网各级调度机构、发电厂、变电站、集控中心等提供统一的时间基准，以满足各种系统和设备对时间同步的要求，?_保实时数据采集时间一致性，提高线路故障测距、相量和功角动态监测、机组和电网参数校验的准确性，从而提高电网事故分析和稳定控制水平，提高电网运行效率和可靠性。 1 时间的基本概念时间是物理学的一个基本参量，也是物资存在的基本形式之一，是所谓空间坐标的第四维。时间表示物资运行的连续性和事件发生的次序和久暂。与长度、质量、温度等其他物理量相比，时间最大的特点是不可能保存恒定不变。“时间”包含了间隔和时刻两个概念。前者描述物资运动的久暂；后者描述物资运动在某一瞬间对应于绝对时间坐标的读数，也就是描述物资运动在某一瞬间到时间坐标原点之间的距离。

2 时钟配置方案及特点智能变电站宜采用主备式时间同步系统，由两台主时钟、多台从时钟、信号传输介质组成，为被授时设备、系统对时。主时钟采用双重花配置，支持北斗二代系统和GPS标准授时信号，优先采用北斗二代系统，主时钟对从时钟授时，从时钟为被授时设备、系统授时。时间同步景点和授时精度满足站内所以设备的对时精度要求。站控层设备宜采用SNIP对时方式，间隔层和过程层设备采用直流IRIG-B码对时方式，条件具备时也可以采用IEEE1588网络对时。在智能变电站中，时间装置的技术特点及主要指标如下：（1）多时钟信号源输入无缝切换功能。具备信号输入仲裁机制，在信号切换时IPPS输出稳定在0.2 us以内。（2）异常输入信息防误功能。在外界输入信号收到干扰时，仍然能准确输出时间信息。（3）高精度授时、授时性能。时间同步准确度优于1us，秒脉冲抖动小于0.1us，授时性能优于1us/h。（4）从时钟延时补偿功能。弥补传输介质对秒脉冲的延迟影响。（5）提供高精度可靠的IEEE1588时钟源。（6）支持DL/T860建模及MMS组网。（7）丰富的对时方式，配置灵活。支持RS232、RS485、空触点、光纤、网络等多种对时方式。

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