INA-02184_97中文资料
Low Noise, Cascadable
Silicon Bipolar MMIC Amplifier Technical Data
Features
?Cascadable 50 ? Gain Block ?Low Noise Figure:
2.0 dB Typical at 0.5 GHz ?High Gain:
31 dB Typical at 0.5 GHz 26 dB Typical at 1.5 GHz ? 3 dB Bandwidth:DC to 0.8 GHz ?Unconditionally Stable (k>1)?Low Cost Plastic Package
Package 84
Description
The INA-02184 and INA-02186 are low-noise silicon bipolar Mono-lithic Microwave Integrated
Typical Biasing Configuration
INA-02184INA-02186
Package 86
C
V CC
RF IN
RF OUT
INA-02184, -02186 Absolute Maximum Ratings
Parameter
Absolute Maximum [1]
Device Current
50 mA Power Dissipation [2,3,4]400 mW RF Input Power
+13 dBm Junction Temperature +150°C Storage Temperature
–65 to 150°C
Thermal Resistance [2]: θjc = 90°C/W — INA-02184 θjc = 100°C/W — INA-02186
Notes:
1.Permanent damage may occur if any of these limits are exceeded.
2.T CASE = 25°C.
3.Derate at 11.1 mW/°C for T C >144°C for INA-0218
4.
4.Derate at 10 mW/°C for T C > 110°C for INA-02186.
G P Power Gain (|S 21|2) f = 0.5 GHz dB 29.031.0
29.031.0
?G P Gain Flatness f = 0.01 to 1.0 GHz
dB ±2.0±2.0f 3 dB 3 dB Bandwidth [2]GHz 0.80.8ISO Reverse Isolation (|S 12|2)
f = 0.01 to 1.0 GHz dB
3939Input VSWR (Max over Freq. Range) f = 0.01 to 1.0 GHz 1.5 2.0Output VSWR (Max over Freq. Range) f = 0.01 to 1.0 GHz 1.7 1.7NF 50 ? Noise Figure
f = 0.5 GHz dB 2.0 2.0P 1 dB Output Power at 1 dB Gain Compression f = 0.5 GHz dBm 1111IP 3Third Order Intercept Point f = 0.5 GHz dBm 2323t D Group Delay f = 0.5 GHz
psec 330350V d Device Voltage
V 4.0
5.57.0
4.0
5.57.0
dV/dT
Device Voltage Temperature Coefficient
mV/°C
+10
+10
Notes:
1.The recommended operating current range for this device is 30 to 40 mA. Typical performance as a function of current is on the following page.
2.Referenced from 10 MHz Gain (G P ).
INA-02184, -02186 Electrical Specifications [1], T A = 25°C
Symbol Parameters and Test Conditions: I d = 35 mA, Z O = 50 ?Units Min.Typ.Max.Min.Typ.Max.
VSWR INA-02184, -02186 Part Number Ordering Information
Part Number No. of Devices
Container INA-02184-TR110007" Reel INA-02184-BLK 100Antistatic Bag INA-02186-TR110007" Reel INA-02186-BLK
100
Antistatic Bag
For more information, see “Tape and Reel Packaging for Semiconductor Devices”.
INA-02184 INA-02186
INA-02184, -02186 Typical Performance, T A = 25°C
(unless otherwise noted)
10
20
30
40
50
I d (m A )
G p (d B )
I d (mA)
04628
V d (V)
Figure 2. Device Current vs. Voltage.FREQUENCY (GHz)FREQUENCY (GHz)
Figure 5. Output Power at 1 dB Gain Compression vs. Frequency.
Figure 6. Noise Figure vs. Frequency.
N F (d B )
152025
30
35
1.5.01.02
.05
0.10.2
0.5
1.0
2.0
2.0
2.5
3.0
3.5
G p (d B )
N F (d B )
FREQUENCY (GHz)
Figure 1. Typical Gain and Noise Figure vs. Frequency, T A = 25°C, I d = 35 mA.
1520
2530
35
20
30
4050
Figure 3. Power Gain vs. Current.
0.1 GHz 1.5 GHz
1.0 GHz 0.5 GHz
1.5
2.0
2.5
30
3132–55
–25+25+85+125
N F (d B )
1.53.0
2.5
3.5
2.0
P 1
d B (d B m )
P 1 d B (d B m )
G p (d B )
TEMPERATURE (°C)Figure 4. Output Power and 1 dB Gain Compression, NF and Power Gain vs.
Case Temperature, f = 0.5 GHz, I d = 35 mA.
FREQUENCY (GHz)Figure 7. Input VSWR vs. Frequency, I d = 35 mA.1.00:11.75:1
1.50:1
2.00:1
1.25:1FREQUENCY (GHz)
Figure 8. Output VSWR vs. Frequency, I d = 35 mA.
1.00:11.75:1
1.50:1
2.00:1
1.25:1
Typical INA-02184 Scattering Parameters (Z
O = 50 ?, T
A
= 25°C, I
d
= 35 mA)
Freq.
GHz Mag Ang dB Mag Ang dB Mag Ang Mag Ang k 0.01.09–17631.939.33–1–40.0.0101.25–1 1.40 0.05.09–17131.939.24–6–41.9.008–12.25–4 1.66 0.10.10–16331.839.07–13–40.9.0091.25–8 1.52 0.20.13–15931.738.30–26–40.0.01015.23–13 1.44 0.30.15–16131.437.30–39–38.4.01216.22–17 1.29 0.40.18–16831.236.42–51–39.2.01132.21–15 1.39 0.50.19–17531.035.40–63–40.0.01034.21–16 1.52 0.60.2017930.734.20–75–37.1.01435.21–17 1.24
0.80.1916629.931.21–101–38.4.01238.24–26 1.44
1.00.1715928.426.36–126–36.5.01553.24–41 1.40 1.20.1515926.821.89–149–34.0.02056.22–60 1.31 1.40.1516324.817.36–169–33.
2.02262.18–78 1.50 1.60.1616822.61
3.59175–31.
4.02767.14–93 1.50
1.80.1816820.710.86161–31.1.02861.11–108 1.74
2.00.1916518.88.71149–30.2.03164.08–125 1.92
2.50.2315914.9 5.56127–29.1.03556.05–167 2.54
3.00.2715011.5 3.76106–27.1.04465.04156 2.89
3.50.301438.8 2.7489–26.0.05057.04137 3.39
4.00.33133 6.6 2.1473–2
5.0.05662.05137 3.78
S11S21S12 S22
Typical INA-02186 Scattering Parameters (Z
O = 50 ?, T
A
= 25°C, I
d
= 35 mA)
Freq.
GHz Mag Ang dB Mag Ang dB Mag Ang Mag Ang k 0.01.09–17831.537.38–1–40.0.0101.24–1 1.46 0.05.09–17231.537.55–6–37.7.01311.24–5 1.22 0.10.11–16031.537.46–13–39.2.0118.23–9 1.37 0.20.14–15331.437.04–25–40.9.00915.22–17 1.60 0.30.18–15631.336.62–37–38.4.0121.21–25 1.30 0.40.22–16131.236.20–49–37.7.01328.19–30 1.25 0.50.25–16931.135.70–61–39.2.01142.18–35 1.40 0.60.28–17730.934.94–74–38.4.01244.16–39 1.33
0.80.3116530.232.34–101–36.5.01552.15–47 1.20
1.00.3014828.827.64–129–34.4.01957.12–59 1.15 1.20.2713527.02
2.26–153–32.4.02462.09–70 1.15 1.40.2412924.717.22–173–31.1.02861.07–80 1.23 1.60.2112822.51
3.27170–31.
4.02762.04–82 1.52
1.80.2012920.410.42156–29.1.03561.02–83 1.50
2.00.2013118.48.34144–29.1.0356
3.01–20 1.79
2.50.2313314.5 5.29123–27.1.04459.0230 2.15
3.00.2713011.2 3.61103–25.7.05263.0227 2.56
3.50.311248.3 2.6086–2
4.4.06064.0234 2.97
4.00.34118 6.1 2.0270–23.4.06858.0130 3.28
S11S21S12 S22
Emitter Inductance and Performance
As a direct result of their circuit topology, the performance of INA MMICs is extremely sensitive to groundpath (“emitter”) induc-tance. The two stage design creates the possibility of a feed-back loop being formed through the ground returns of the stages. If the path to ground provided by the external circuit is “long” (high in impedance) compared to the path back through the ground return of the other stage, then instability can occur (see Fig. 1). This phenomena can show up as a “peaking” in the gain versus frequency response (perhaps creating a negative gain slope amplifier), an increase in input VSWR, or even as return gain (a reflection coefficient greater than
unity) at the input of the MMIC.
The “bottomline” is that excellent
grounding is critical when
using INA MMICs. The use of
plated through holes or equivalent
minimal path ground returns at
the device is essential. An
appropriate layout is shown in
Figure 2. A corollary is that
designs should be done on the
thinnest practical substrate. The
parasitic inductance of a pair of
via holes passing through 0.032"
thick P.C. board is approximately
0.1 nH, while that of a pair of via
holes passing through 0.062" thick
board is close to 0.5 nH. HP does
not recommend using INA family
MMICs on boards thicker than
32mils.
These stability effects are entirely
predictable. A circuit simulation
using the data sheet S-parameters
and including a description of the
ground return path (via model or
equivalent “emitter” inductance)
will give an accurate picture of the
performance that can be ex-
pected. Device characterizations
are made with the ground leads of
the MMIC directly contacting a
solid copper block (system
ground) at a distance of 2 to 4 mils
from the body of the package.
Thus the information in the data
sheet is a true description of the
performance capability of the
MMIC, and contains minimal
contributions from fixturing.
Figure 1. INA Potential
Ground Loop.Figure 2. INA Circuit Board 2x Actual Size.
Package 84 Dimensions Package 86 Dimensions
DIMENSIONS ARE IN MILLIMETERS (INCHES)
0.51 ±
(0.105 ± 0.15)
DIMENSIONS ARE IN MILLIMETERS (INCHES) 1.52 ± 0.25
L
45