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IC datasheet pdf-DRV601,pdf(DIRECTPATH (TM) STEREO LINE DRIVER)

DRV601

https://www.sodocs.net/doc/2010519221.html,.........................................................................................................................................SLOS553C–JANUARY2008–REVISED SEPTEMBER2009 DIRECTPATH?STEREO LINE DRIVER,ADJUSTABLE GAIN

Check for Samples:DRV601

FEATURES?Independent Right and Left Channel

Shutdown Control

?External Gain Setting Resistors

?Short-Circuit and Thermal Protection

?Space Saving Package

?Pop Reduction Circuitry –20-Pin,4mm×4mm Thin QFN,Thermally

Optimized PowerPAD?Package

APPLICATIONS

?Ground-Referenced Outputs Eliminate

?Set-Top Boxes

DC-Blocking Capacitor

?CD/DVD Players

–Reduce Board Area

?DVD-Receivers

–Reduce Component Cost

?HTIB

–Improve THD+N Performance

?PDP/LCD TV's

–No Degradation of Low-Frequency

Response Due to Output Capacitors

?Wide Power Supply Range:1.8V to4.5V

?2Vrms/Ch Output Voltage into600?at3.3V

supply

DESCRIPTION

The DRV601is a stereo line driver designed to allow the removal of the output dc-blocking capacitors for reduced component count and cost.The device is ideal for single supply electronics where size and cost are critical design parameters.

The DRV601is capable of driving2Vrms into a600-?load at3.3V.The device has external gain setting resistors,that support a gain range of-1V/V to-10V/V,and line outputs that has±8-kV IEC ESD protection.The device has independent shutdown control for the right and left audio channels.

The DRV601is available in a4mm×4mm Thin QFN package.

Please be aware that an important notice concerning availability,standard warranty,and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

S V O U S V NC ?No internal connection

DRV601

SLOS553C –JANUARY 2008–REVISED SEPTEMBER https://www.sodocs.net/doc/2010519221.html,

These devices have limited built-in ESD protection.The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

RTJ (QFN)PACKAGE

(TOP VIEW)

TERMINAL FUNCTIONS

TERMINAL

I/O DESCRIPTION NAME

QFN C1P

1I/O Charge pump flying capacitor positive terminal PGND

2I Power ground,connect to ground.C1N

3I/O Charge pump flying capacitor negative terminal

4,6,8,12,16,20No connection PVSS

5O Output from charge pump.SVSS

7I Amplifier negative supply,connect to PVSS via star connection.OUTL

9O Left audio channel output signal SVDD

10I Amplifier positive supply,connect to PVDD via star connection.OUTR

11O Right audio channel output signal INL

13I Left audio channel input signal SDR

14I Right channel shutdown,active low logic.INR

15I Right audio channel input signal SGND

17I Signal ground,connect to ground.SDL

18I Left channel shutdown,active low logic.PVDD

19I Supply voltage,connect to positive supply.Exposed Pad Exposed pad must be soldered to a floating plane.Do NOT connect to power or ground.

DRV601

ABSOLUTE MAXIMUM RATINGS(1)

over operating free-air temperature range,T A=25°C(unless otherwise noted)

VALUE/UNIT Supply voltage,AVDD,PVDD–0.3V to5.5V

V I Input voltage V SS–0.3V to V DD+0.3V

R(Load)Minimum load impedance≥100?

T A Operating free-air temperature range–40°C to85°C

T J Operating junction temperature range0°C to150°C

T stg Storage temperature range–65°C to85°C

(1)Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device.These are stress ratings

only,and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied.Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

AVAILABLE OPTIONS

T A PACKAGED DEVICES(1)PART NUMBER SYMBOL -40°C to85°C20-pin,4mm×4mm QFN DRV601RTJ(2)AKQ

(1)For the most current package and ordering information,see the Package Option Addendum at the end of this document,or see the TI

website at https://www.sodocs.net/doc/2010519221.html,.

(2)The RTJ package is only available taped and reeled.To order,add the suffix“R”to the end of the part number for a reel of3000,or add

the suffix“T”to the end of the part number for a reel of250(e.g.,DRV601RTJR).

RECOMMENDED OPERATING CONDITIONS

MIN MAX UNIT

V SS Supply voltage,AVDD,PVDD 1.8 4.5(1)V

V IH High-level input voltage SDL,SDR 1.5V

V IL Low-level input voltage SDL,SDR0.5V

T A Operating free-air temperature–4085°C (1)Device can shut down for V DD>4.5V to prevent damage to the device.

ELECTRICAL CHARACTERISTICS

T A=25°C(unless otherwise noted)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT |V OS|Output offset voltage V DD=1.8V to4.5V,Inputs grounded8mV PSRR Power Supply Rejection Ratio V DD=1.8V to4.5V88dB

V OH High-level output voltage V DD=3.3V,R L=600? 3.10V

V OL Low-level output voltage V DD=3.3V,R L=600?–3.05V

|I IH|High-level input current(SDL,SDR)V DD=4.5V,V I=V DD1μA

|I IL|Low-level input current(SDL,SDR)V DD=4.5V,V I=0V1μA

V DD=1.8V,No load,SDL=SDR=V DD 5.3

V DD=3.3V,No load,SDL=SDR=V DD7.1mA

I DD Supply Current

V DD=4.5V,No load,SDL=SDR=V DD8.7

Shutdown mode,V DD=1.8V to4.5V1μA

DRV601

SLOS553C–JANUARY2008–REVISED https://www.sodocs.net/doc/2010519221.html,

OPERATING CHARACTERISTICS

V DD=3.3V,T A=25°C,R L=600?,C(PUMP)=C(PVSS)=1μF,C IN=1μF,R in=10k?,R fb=20k?(unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

THD=1%,V DD=3.3V,f=1kHz 2.1

THD=1%,V DD=4.5V,f=1kHz 2.7

V O Output Voltage(Outputs In Phase)V RMS

THD=1%,V DD=4.5V,f=1kHz,R L=

2.8

100k?

V O=2Vrms,f=1kHz0.008%

THD+N Total harmonic distortion plus noise

V O=2Vrms,f=6.67kHz0.030% Crosstalk V O=2Vrms,f=1kHz-80dB

A vo Open-loop voltage gain155dB

R in Input resistor range11047k?

R fb Feedback resistor range 4.720100k?Slew rate 2.2V/μs

Maximum capacitive load300pF

V n Noise output voltage22-kHz filter,A-weighted10μVrms ESD Electrostatic discharge OUTR,OUTL±8kV

f osc Charge pump switchin

g frequency225450690kHz

Start-up time from shutdown450μs

Input impedance1M?

V o=2Vrms(THD+N=0.1%),22-kHz BW,

SNR Signal-to-noise ratio105dB

A-weighted

G(bw)Unity Gain Bandwidth 3.5MHz

Threshold150170°C Thermal shutdown

Hysteresis15°C

Functional Block Diagram

-R

-L DRV601

Functional Block Diagram

V - Output Voltage - Vrms O T H D + N - t o t a l H a r m o n i c D i s t o r t i o n + N o i s e - %

0.001100.010.11T H D + N - t o t a l H a r m o n i c D i s t o r t i o n + N o i s e - %V - Output Voltage - Vrms O

T H D + N - t o t a l H a r m o n i c D i s t o r t i o n + N o i s e - %V - Output Voltage - Vrms O

T H D + N - t o t a l H a r m o n i c D i s t o r t i o n + N o i s e - %V - Output Voltage - Vrms O DRV601

SLOS553C –JANUARY 2008–REVISED SEPTEMBER https://www.sodocs.net/doc/2010519221.html,

TYPICAL CHARACTERISTICS

C (PUMP)=C (PVSS)=1μF ,C IN =1μF,R in =10k ?,R fb =20k ?(unless otherwise noted)

Table of Graphs

FIGURE

Total harmonic distortion +noise

vs Output Voltage 1-6Total harmonic distortion +noise

vs Frequency 7-8Quiescent supply current

vs Supply voltage 9Output spectrum

10Gain and phase

vs Frequency 11-12TOTAL HARMONIC DISTORTION +NOISE

TOTAL HARMONIC DISTORTION +NOISE TOTAL HARMONIC DISTORTION +NOISE vs

vs vs OUTPUT VOLTAGE

OUTPUT VOLTAGE OUTPUT VOLTAGE Figure 1.

Figure 2.Figure 3.TOTAL HARMONIC DISTORTION +NOISE

TOTAL HARMONIC DISTORTION +NOISE TOTAL HARMONIC DISTORTION +NOISE vs

vs vs OUTPUT VOLTAGE

OUTPUT VOLTAGE OUTPUT VOLTAGE Figure 4.Figure 5.Figure 6.

f - frequency - Hz T H D + N - t o t a l H a r m o n i c D i s t o r t i o n + N o i s e - %

f - frequency - Hz T H D + N - t o t a l

H a r m o n i c D i s t o r t i o n + N o i s e - %01024680 4.5

0.51 1.52 2.53 3.5V - Supply Voltage - V

DD I - S u p p l y C u r r e n t - m A D D

f - frequency - Hz F F T - d B r 373.544.555.566.5

f - frequency - Hz G a i n - d B f - frequency - Hz P h a s e - d e g

DRV601

https://www.sodocs.net/doc/2010519221.html, .........................................................................................................................................SLOS553C –JANUARY 2008–REVISED SEPTEMBER 2009TOTAL HARMONIC DISTORTION +NOISE

TOTAL HARMONIC DISTORTION +NOISE QUIESCENT SUPPLY CURRENT vs

vs vs FREQUENCY

FREQUENCY SUPPLY VOLTAGE Figure 7.

Figure 8.Figure 9.FFT

GAIN PHASE vs

vs vs FREQUENCY

FREQUENCY FREQUENCY Figure 10.Figure 11.Figure 12.

f= c

2R C p

L O

2R f

L c

OUT

GND

V/2

Conventional

GND

DirectPath

DRV601

SLOS553C–JANUARY2008–REVISED https://www.sodocs.net/doc/2010519221.html,

APPLICATION INFORMATION

Line Driver Amplifiers

Single-supply Line Driver amplifiers typically require dc-blocking capacitors.The top drawing in Figure13 illustrates the conventional Line Driver amplifier connection to the load and output signal.

DC blocking capacitors are often large in value.The line load(typical resistive values of600?to10k?) combine with the dc blocking capacitors to form a high-pass filter.Equation1shows the relationship between the load impedance(R L),the capacitor(C O),and the cutoff frequency(f C).

(1)

C O can be determined using Equation2,where the load impedance and the cutoff frequency are known.

(2) If f C is low,the capacitor must then have a large value because the load resistance is https://www.sodocs.net/doc/2010519221.html,rge capacitance values require large package https://www.sodocs.net/doc/2010519221.html,rge package sizes consume PCB area,stand high above the PCB, increase cost of assembly,and can reduce the fidelity of the audio output signal.

Figure13.Amplifier Applications

The DirectPath?amplifier architecture operates from a single supply but makes use of an internal charge pump to provide a negative voltage https://www.sodocs.net/doc/2010519221.html,bining the user provided positive rail and the negative rail generated by the IC,the device operates in what is effectively a split supply mode.The output voltages are now centered at zero volts with the capability to swing to the positive rail or negative rail.The DirectPath?amplifier requires no output dc blocking capacitors.The bottom block diagram and waveform of Figure13illustrate the ground-referenced Line Driver architecture.This is the architecture of the DRV601.

fc IN+1

2p R IN C IN

C IN+1

2p fc IN R IN

DRV601

The charge pump flying capacitor serves to transfer charge during the generation of the negative supply voltage. The PVSS capacitor must be at least equal to the charge pump capacitor in order to allow maximum charge transfer.Low ESR capacitors are an ideal selection,and a value of1μF is typical.Capacitor values that are smaller than1μF can be used,but the maximum output voltage may be reduced and the device may not operate to specifications.

Decoupling Capacitors

The DRV601is a DirectPath?Line Driver amplifier that require adequate power supply decoupling to ensure that the noise and total harmonic distortion(THD)are low.A good low equivalent-series-resistance(ESR) ceramic capacitor,typically2.2μF,placed as close as possible to the device V DD lead works best.Placing this decoupling capacitor close to the DRV601is important for the performance of the amplifier.For filtering lower frequency noise signals,a10-μF or greater capacitor placed near the audio power amplifier would also help,but it is not required in most applications because of the high PSRR of this device.

Gain setting resistors ranges

The gain setting resistors,R in and R fb,must be chosen so that noise,stability and input capacitor size of the DRV601is kept within acceptable limits.Voltage gain is defined as R fb divided by R in.

Selecting values that are too low demands a large input ac-coupling capacitor,C IN.Selecting values that are too high increases the noise of the amplifier.Table1lists the recommended resistor values for different gain settings.

Table1.Recommended Resistor Values

Gain Input Resistor Value,R in Feedback Resistor Value,R fb

-1V/V10k?10k?

-1.5V/V10k?15k?

-2V/V10k?20k?

-10V/V4,7k?47k?

Input-Blocking Capacitors

DC input-blocking capacitors are required to be added in series with the audio signal into the input pins of the DRV601.These capacitors block the DC portion of the audio source and allow the DRV601inputs to be properly biased to provide maximum performance.

These capacitors form a high-pass filter with the input resistor,R in.The cutoff frequency is calculated using Equation3.For this calculation,the capacitance used is the input-blocking capacitor and the resistance is the input resistor chosen from the gain table above,then the frequency and/or capacitance can be determined when one of the two values are given.

(3) Supply Voltage Limiting At4.5V

The DRV601have a built-in charge pump which serves to generate a negative rail for the line driver.Because the line driver operates from a positive voltage and negative voltage supply,circuitry has been implemented to protect the devices in the amplifier from an overvoltage condition.Once the supply is above4.5V,the DRV601 can shut down in an overvoltage protection mode to prevent damage to the device.The DRV601resume normal operation once the supply is reduced to4.5V or lower.

Capacitive load

The DRV601has the ability to drive a high capacitive load up to330pF directly,higher capacitive loads can be accepted by adding a series resistor of10?or larger.The figure below shows a10kHz signal into a470pF capacitor using the10R series resistor.

t ?Time = 20 ms/div

C h 2

1V /d i v

DRV601

SLOS553C –JANUARY 2008–REVISED SEPTEMBER https://www.sodocs.net/doc/2010519221.html,

SQUARE WAVE OUTPUT VOLTAGE

with

CAPACITIVE LOAD

Figure 14.

Layout Recommendations

A proposed layout for the DRV601can be seen in the DRV601EVM user's guide,SLOU215,and the Gerber files can be downloaded on https://www.sodocs.net/doc/2010519221.html, ,open the DRV601product folder and look in the Tools &Software folder.Exposed Pad On DRV601RTJ Package

The exposed metal pad on the DRV601RTJ package must be soldered down to a pad on the PCB in order to maintain reliability.The pad on the PCB should be allowed to float and not be connected to ground or power .Connecting this pad to power or ground prevents the device from working properly because it is connected internally to PVSS.

SGND and PGND Connections

The SGND and PGND pins of the DRV601must be routed back to the decoupling capacitor separately in order to provide proper device operation.If the SGND and PGND pins are connected directly to each other,the part functions without risk of failure,but the noise and THD performance do not meet the specifications.

Gain setting resistors

The gain setting resistors,R in and R fb ,must be placed close to pin 13respectively pin 17to minimize the capacitive loading on these input pins and to ensure maximum stability of the DRV601.For the recommenced PCB layout,see the DRV601EVM user guide.

Right Output DRV601

Figure15.Application Circuit

REVISION HISTORY

Changes from Original(January2008)to Revision A Page ?Changed T A From:-40°C to85°C To:0°C to70°C(AVAILABLE OPTIONS table) (3)

Changes from Revision A(August2008)to Revision B Page

?Changed T A From:0°C to70°C To:-40°C to85°C(ABSOLUTE MAXIMUM RATING table) (3)

?Changed T A From:0°C to70°C To:-40°C to85°C(AVAILABLE OPTIONS table) (3)

?Changed T A From:0°C to70°C To:-40°C to85°C(RECOMMENDED OPERATING CONDITIONS table) (3)

Changes from Revision B(Novemebr2008)to Revision C Page ?Changed values-Charge pump switching frequency.From:Min=280Typ=320Max=420To:Min=225Typ= 450Max=690 (4)

PACKAGING INFORMATION Orderable Device

Status (1)Package Type Package Drawing Pins Package Qty Eco Plan (2)Lead/Ball Finish MSL Peak Temp (3)DRV601RTJR

ACTIVE QFN RTJ 203000Green (RoHS &no Sb/Br)CU NIPDAU Level-2-260C-1YEAR DRV601RTJRG4

ACTIVE QFN RTJ 203000Green (RoHS &no Sb/Br)CU NIPDAU Level-2-260C-1YEAR DRV601RTJT

ACTIVE QFN RTJ 20250Green (RoHS &no Sb/Br)CU NIPDAU Level-2-260C-1YEAR DRV601RTJTG4

ACTIVE QFN RTJ 20250Green (RoHS &no Sb/Br)CU NIPDAU Level-2-260C-1YEAR (1)The marketing status values are defined as follows:

ACTIVE:Product device recommended for new designs.

LIFEBUY:TI has announced that the device will be discontinued,and a lifetime-buy period is in effect.

NRND:Not recommended for new designs.Device is in production to support existing customers,but TI does not recommend using this part in a new design.

PREVIEW:Device has been announced but is not in production.Samples may or may not be available.

OBSOLETE:TI has discontinued the production of the device.

(2)Eco Plan -The planned eco-friendly classification:Pb-Free (RoHS),Pb-Free (RoHS Exempt),or Green (RoHS &no Sb/Br)-please check https://www.sodocs.net/doc/2010519221.html,/productcontent for the latest availability information and additional product content details.

TBD:The Pb-Free/Green conversion plan has not been defined.

Pb-Free (RoHS):TI's terms "Lead-Free"or "Pb-Free"mean semiconductor products that are compatible with the current RoHS requirements for all 6substances,including the requirement that lead not exceed 0.1%by weight in homogeneous materials.Where designed to be soldered at high temperatures,TI Pb-Free products are suitable for use in specified lead-free processes.

Pb-Free (RoHS Exempt):This component has a RoHS exemption for either 1)lead-based flip-chip solder bumps used between the die and package,or 2)lead-based die adhesive used between the die and leadframe.The component is otherwise considered Pb-Free (RoHS compatible)as defined above.

Green (RoHS &no Sb/Br):TI defines "Green"to mean Pb-Free (RoHS compatible),and free of Bromine (Br)and Antimony (Sb)based flame retardants (Br or Sb do not exceed 0.1%by weight in homogeneous material)

(3)MSL,Peak Temp.--The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications,and peak solder temperature.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided.TI bases

its knowledge and belief on information provided by third parties,and makes no representation or warranty as to the accuracy of such information.Efforts are underway to better integrate information from third parties.TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.TI and TI suppliers consider certain information to be proprietary,and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s)at issue in this document sold by TI to Customer on an annual basis.

PACKAGE OPTION ADDENDUM

https://www.sodocs.net/doc/2010519221.html, 21-Aug-2009

TAPE AND REEL INFORMATION

*All dimensions are nominal Device Package Type Package Drawing

Pins

SPQ Reel Diameter (mm)Reel Width W1(mm)A0(mm)B0(mm)K0(mm)P1(mm)W (mm)Pin1Quadrant DRV601RTJR QFN

RTJ 203000330.012.4 4.3 4.3 1.18.012.0Q2DRV601RTJR QFN

RTJ 203000330.012.4 4.25 4.25 1.158.012.0Q2DRV601RTJT QFN RTJ 20250

180.012.4 4.25 4.25 1.158.012.0Q2

*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length(mm)Width(mm)Height(mm) DRV601RTJR QFN RTJ203000370.0355.055.0 DRV601RTJR QFN RTJ203000346.0346.029.0

DRV601RTJT QFN RTJ20250190.5212.731.8

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IC datasheet pdf-DRV601,pdf(DIRECTPATH (TM) STEREO LINE DRIVER)

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