OCTAL D FLIP-FLOP WITH CLEAR
The SN54/74LS273 is a high-speed 8-Bit Register. The register consists of eight D-Type Flip-Flops with a Common Clock and an asynchronous active LOW Master Reset. This device is supplied in a 20-pin package featuring 0.3inch lead spacing.
?8-Bit High Speed Register ?Parallel Register
?Common Clock and Master Reset
?Input Clamp Diodes Limit High-Speed T ermination Effects
0011223
3
CONNECTION DIAGRAM DIP (TOP VIEW)
PIN NAMES
LOADING (Note a)CP Clock (Active HIGH Going Edge) Input D 0–D 7Data Inputs
MR Master Reset (Active LOW) Input Q 0–Q 7
Register Outputs (Note b)NOTES:
a) 1 TTL Unit Load (U.L.) = 40 μA HIGH/1.6 mA LOW.
b) The Output LOW drive factor is 2.5 U.L. for Military (54) and 5 U.L. for Commercial (74) T emperature Ranges.
L = LOW Logic Level X = Immaterial
LOGIC DIAGRAM
Q 0
Q 1
Q 2
Q 3
Q 4
Q 5
Q 6
Q 7
142
6
73845
9
12
1315
V CC GND = PIN NUMBERS
1718
16
19