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宽电压输入反激电源400-V to 690-V AC Input, 50-W Flyback Isolated Power Supply

TI Designs

400-to690-V AC Input50-W Flyback Isolated Power Supply Reference Design for Motor Drives

TI Designs Design Features

TI Designs provide the foundation that you need?50-W main power supply with isolated and including methodology,testing and design files to nonisolated voltage rails to power control

quickly evaluate and customize the system.TI Designs electronics within variable speed drive

help you accelerate your time to market.?Can operate with dc(1200V dc max)or ac input

(380–690V ac)

Design Resources

?<5%load and line regulation

Tool Folder Containing Design Files

TIDA-00173?Input UV/OV,output overload,and sc protection UCC28711Product Folder?Protection against loss of feedback

LMS33460Product Folder?Lower-cost solution using UCC28711through

primary side regulation

–Eliminates feedback loop

–Use of1000-V rated MOSFET

?Quasi-resonant mode controller improves EMI

?–10°C to65°C max operating temperature range

?Designed to comply with IEC61800-5

Featured Applications

?Variable Speed ac and dc Drives

?Industrial Inverters

?Solar Inverters

?UPS Systems

?Servo Drives

An IMPORTANT NOTICE at the end of this TI reference design addresses authorized use,intellectual property matters and other important disclaimers and information.

All trademarks are the property of their respective owners.

1 TIDU412A–September2014–Revised November2014400-to690-V AC Input50-W Flyback Isolated Power Supply Reference

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3 phase input 200-240 Vac ± 10%System Description https://www.sodocs.net/doc/419767874.html,

1System Description

Variable-speed drive (VSD)consists of a power section,controller,user IO,display,and communication blocks.The power section contains a rectifier,a dc link,inrush current limiting,and an insulated-gate

bipolar transistor (IGBT)based inverter.VSD can be based on single or dual controller architecture.When using single controller architecture,the same processor controls generation of pulse-width modulation (PWM),motion control,IO interface,and communication.When dual controller architecture is used,PWM and motion control have a dedicated controller and the other controller is used for application control.The main power supply,either powered directly from ac mains or from dc links,is used to generate multiple voltage rails.Multiple voltage rails are required for the operation of all the control electronics in the drive.The traditional way of implementing the main power supply is to use flyback converters with PWM

controller ICs,such as UCC3842,UCC3843,or UCC3844.Due to a regenerative action from the motor,the voltage rating of the MOSFET used in the flyback converter has to be >1.5kV,depending upon the voltage rating of the drive.Opto-couplers are used for isolated feedback and to regulate the output

voltage.In case of failure of components used in the feedback path,the output may reach a dangerously high level,which would damage all the electronic https://www.sodocs.net/doc/419767874.html,e of controllers like the UCC3842device presents other challenges,for example,limiting the power during short circuit across wide input-voltage range and power dissipation in the resistors used in startup circuit.

The primary objective of this reference design is to create a power supply with reduced BOM cost and a reusable design for drives operating at both 400-V and 690-V inputs.Other benefits include:?Topology to replace single high-voltage FET with two low-cost FETs ?Constant uniform power limit throughout the input range

?Reduced BOM cost by using UCC28711through primary side regulation,thus eliminating isolated secondary feedback

?Protection against component failure in the feedback path

This reference design provides isolated 24V,16V,–16V,and 6V outputs to power the control

electronics in variable speed drives.The power supply can be either powered directly from 3-phase ac mains or can be powered from dc-link voltage.This design uses quasi-resonant flyback topology and is rated for 50-W output.The line and load regulation of the power supply is designed to be within 5%.The power supply is designed to meet the clearance,creepage,and isolation test voltages as per IEC61800-5requirements.

Figure 1.Variable-Speed Drive Topology

2

400-to 690-V AC Input 50-W Flyback Isolated Power Supply Reference TIDU412A–September 2014–Revised November 2014

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RS485

INTERFACE 6V

https://www.sodocs.net/doc/419767874.html,

System Description

Figure 2.Drive Control Architecture with Typical Power Consumption

1.1Requirements of Power Supply

The requirements of the main power supply to be used in drive applications are as follows:?400V dc to 1200V dc input ?50-W output power

?>40kHz switching frequency ?Quasi-resonant mode controller ?80%expected efficiency

?<200mV secondary ripple voltage ?<5%load and line regulation ?Input UV/OV shutdown

?Output overload shutdown with power limit ?Can be powered from ac mains or from dc link

?Isolated measurement of dc link voltage (input)through indirect technique ?Detection of single phase scenario through dc link measurement ?EMC filter and surge protection required ?65°C max ambient temperature

?Clearance and creepage as per IEC 61800-5-2

3

TIDU412A–September 2014–Revised November 2014400-to 690-V AC Input 50-W Flyback Isolated Power Supply Reference

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Design Features https://www.sodocs.net/doc/419767874.html, 2Design Features

This power-supply design is intended to replace the high-cost,high-voltage MOSFET with a low-cost,low-voltage MOSFET along with omission of feedback components.Also,the power supply is designed to

operate across a wide input range,which will suit drives operating from400V and690V ac inputs.The power supply includes the following protection features:

?Output overvoltage fault

?Input undervoltage fault

?Internal overtemperature fault

?Primary overcurrent fault

2.1Topology Selection

Flyback topology is the most widely used switch mode power supply(SMPS)topology in most of the

variable speed drives.The power ratings are below150W and SMPS topologies only require a single

magnetic element;therefore,serves the purpose of isolation,step-up or step-down conversions,and acts as an energy storage element.The attractive feature of using this topology is that no output inductors are required.Other advantages include easy creation of multiple output voltages,very low component count, and low cost.

With flyback converters using a single switching element,an expensive1500V(or more expensive for 690V ac rated drives)MOSFET must be used to support the transformer flyback voltage on top of the high-input voltage and voltage generated through regenerative action.

Figure3.Flyback Controller with Single and Dual MOSFET Switch In the case of cascode flyback converter(see Figure3),MOSFET Q1with low gate charge Qg,is

connected in series with MOSFET Q2.In this case,the Q1is driven directly from the PWM controller.With cascode configuration,it is possible to distribute the voltage stress across two devices,thus resulting in an overall voltage rating equal to the sum of the individual MOSFET https://www.sodocs.net/doc/419767874.html,ing the cascode technique with a low-cost900-V MOSFET results in an overall voltage rating of1800V,which allows supply

operation over the desired wide input-voltage range of350to720V ac.This simple circuit requires a

limited control change,which is attained from the original TVS supplied from input supply.

4400-to690-V AC Input50-W Flyback Isolated Power Supply Reference TIDU412A–September2014–Revised November2014 Design for Motor Drives Submit Documentation Feedback

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Time (s)

V o l t a g e (V )

1002

2002

3002

4002

50026002

7002

8002

9002

1m

Time (s)

V o l t a g e (V )

1002

2002

3002

4002

50026002

7002

8002

9002

1m https://www.sodocs.net/doc/419767874.html, Design Features

2.2

Cascode Operation

2.2.1

Turn ON Sequence

When the gate-source voltage of MOSFET Q1(Vgs1)is greater than its gate threshold voltage,Vth1,the Q1fully enhances and is turned ON.As soon as the Q1turns ON,the source of Q2is connected to

ground through Q1,which makes the zener voltage apply across the gate source of Q2,and it gets turned ON.Next,the cascode converter reaches the conduction state;then the current starts to flow through the primary winding of the flyback transformer and the two switches (Q1and Q2).The voltage drop across both MOSFETs is equal to their on-state voltage drops.

2.2.2Turn OFF Sequence

When the gate-source voltage Vgs1is less than its gate threshold voltage Vth1,MOSFET Q1is turned OFF.The current takes a path through the drain to the source capacitance of Q1.Now the drain source voltage Vds1across Q1starts to increase.At this time,the potential source terminal of HV MOSFET Q2starts to build up.As the potential source terminal of Q2builds up,the gate-source voltage Vgs2of the MOSFET is reduced.When Q2reaches its gate threshold voltage Vth2,the Q2is turned OFF.

Figure 4.V DS Voltage of MOSFETs During Low V IN and High V IN

5

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Design Features https://www.sodocs.net/doc/419767874.html, 2.3Design Requirements

To translate the Requirements of Power Supply to the sub-system level,the requirements of the PWM controller,MOSFETs,and transformer are listed in Section2.3.1through Section2.3.3.

2.3.1PWM Controller

Accurate voltage and constant current regulation primary-side feedback

Primary-side feedback,eliminates the need for opto-coupler feedback circuits

Discontinuous conduction mode with valley switching to minimize switching losses

Protection functions

?Output and input overvoltage fault

?Input undervoltage fault

?Internal over-temperature fault

?Primary overcurrent fault

?Loss of feedback signal

2.3.2Power MOSFETs

?Each MOSFET should have a rated V

≥1000V to support1200V dc input

DS

?Should support1.5A(minimum)drain current

2.3.3Transformer Specifications(as per IEC61800-5-1)

?Four isolated outputs:

–V

=24V,45W

out1

=±16V,4.5W

–V

out2

=6V,0.5W

–V

out3

–V

=16V,15W(only when Vout1is de-rated accordingly)

aux

?Switching frequency=50kHz

?Primary to secondary isolation=7.4kV for1.2,50-μs impulse voltage

?Type test voltage:

–Primary to Secondary=3.6kV

RMS

–Secondary1to Secondary2=1.8kV

RMS

–Secondary1to Secondary3=1.8kV

RMS

–Secondary2to Secondary3=1.8kV

RMS

?Spacings:

–Primary to Secondary clearance=8mm

–Secondary1to Secondary2clearance=5.5mm

–Secondary2to Secondary3clearance=5.5mm

–Secondary3to Secondary4clearance=5.5mm

–Creepage distance=9.2mm

?Functional isolation primary and secondaries=2kV dc

?dc isolation between secondaries=2kV dc

6400-to690-V AC Input50-W Flyback Isolated Power Supply Reference TIDU412A–September2014–Revised November2014 Design for Motor Drives Submit Documentation Feedback

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Primary

24V

16V

GND

-16V

6V_COMM GND1

AUX Winding

15W

https://www.sodocs.net/doc/419767874.html, Design Features

Figure5.Transformer Configuration

7 TIDU412A–September2014–Revised November2014400-to690-V AC Input50-W Flyback Isolated Power Supply Reference

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Block Diagram https://www.sodocs.net/doc/419767874.html, 3Block Diagram

The simplified implementation diagram is shown in Figure6.The transformer has three secondary

windings(two isolated and one nonisolated).The auxiliary winding can be loaded up to15W,provided that the output from the main secondary is reduced from45W to30W.The power train consists of two MOSFETs in cascode connection.In primary-side control,the output voltage is sensed on the auxiliary winding during the transfer of transformer energy to the secondary.

Figure6.Simplified Diagram of the Solution

To achieve an accurate representation of the secondary output voltage on the auxiliary winding,the

discriminator inside the IC reliably blocks the leakage inductance reset and ringing.The discriminator

continuously samples the auxiliary voltage during the down slope after the ringing is diminished and also captures the error signal when the secondary winding reaches zero current.The internal reference on VS is4.05V.Temperature compensation on the VS reference voltage of–0.8mV/°C offsets the change in the output rectifier forward voltage with temperature.The feedback resistor divider is selected as outlined in the VS pin description(see Section5.2.7).

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Time

V s

https://www.sodocs.net/doc/419767874.html, Block Diagram

Figure 7.Aux Waveform —Sampling

9

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Output Current

O u t p u t V o l t a g e (V )

1

2

3

4

5

OCC

Block Diagram https://www.sodocs.net/doc/419767874.html,

3.1Primary-Side Current Regulation

When the average output current reaches the regulation reference in the current control block,the

controller operates in frequency modulation mode to control the output current at any output voltage at or below the voltage regulation target —as long as the auxiliary winding can keep VDD above the UVLO turn-off threshold.

Figure 8.Power Limit

4Highlighted Products

This reference design features the following devices,which were selected based on their specifications.?UCC28711

–Constant-Voltage,Constant-Current PWM Controller with Primary-Side Regulation ?LMS33460

–3-V Undervoltage Detector For more information on each of these devices,see the respective product folders at https://www.sodocs.net/doc/419767874.html, or click on the links for the product folders on the first page of this reference design.

10

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inmax

inrms ac min P 62.5

I 0.182A

1.732V cos 1.7323300.6

?

=

=

=′′′′out inmax P 50

P 62.5W

0.8

===h https://www.sodocs.net/doc/419767874.html, Component Selection and Circuit Design

5Component Selection and Circuit Design 5.1

Component Selection

The UCC28711and LMS33460components are selected based on their specifications.

5.1.1UCC28711

The UCC28700device is a flyback power-supply controller,which provides accurate voltage and constant current regulation with primary-side feedback,thus eliminating the need for opto-coupler feedback circuits.The controller operates in discontinuous conduction mode with valley switching to minimize switching losses.The modulation scheme is a combination of frequency and primary peak-current modulation to provide high conversion efficiency across the load range.The controller has a maximum switching frequency of 130kHz and allows for a shut-down operation using the NTC pin.

5.1.2LMS33460

The LMS33460device is an undervoltage detector with a 3.0-V threshold and extremely low power

consumption.The LMS33460device is specifically designed to accurately monitor power supplies.This IC generates an active output whenever the input voltage drops below 3.0Volts.This device uses a precision on-chip voltage reference and a comparator to measure the input voltage.Built-in hysteresis helps prevent erratic operation in the presence of noise.

5.2Circuit Design

The ac input is full-wave rectified by diodes D1through D12.Resistors R1through R3provide in-rush current limiting and protection against catastrophic circuit failure.Capacitors C6through C8are used to filter the rectified ac supply.Three capacitors of 47μF,450V are connected in a series to support more than 1200V,although 450V is the maximum value available on the market.To avoid an unbalanced voltage spread between capacitors,resistances are connected in parallel with each capacitor.

5.2.1Input Diode Bridge

Equation 1and Equation 2determine the selected input bridge.

(1)

where

?

cos?is the power factor,which is assumed to be 0.6

(2)Equation 3determines the minimum voltage rating of the rectifier.

V dcMIN =(V acMAX ×1.414)+(0.15×V acMAX ×1.4141)=(480×1.414)+(0.15×480×1.414)=780V

(3)

Considering the raise in dc bus voltage due to regenerative action,two diodes of 1000V with 1-A rating are used for the 3-phase bridge rectifier.

11

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60

40

c f 50k 10 1.58kHz

-=

′=Att 40

c sw f f 10=

′rms pk I I 1334mA =′

=′=out d IN 2

222

min min P 502t 2(3.33m)0.8C 13.7F (V 0.9V )(4000.9400)

′′′h 3==m -′-′d 1t 3.33ms

650

==′Component Selection and Circuit Design https://www.sodocs.net/doc/419767874.html,

5.2.2

Selection of Input Capacitors (C IN )

The dc input bulk capacitor C1is used to provide a smooth dc voltage by filtering low frequency ac ripple voltage.For calculating the input filter capacitor,a ripple voltage of 10%(40V)is assumed.Equation 4determines the worst-case discharge time.

(4)

(5)

Equation 6shows the calculation for RMS current.(See Section 5.2.11for D MAX and I pk details)

(6)

Three capacitors of 47μF /450V (EEUED2W470)with a 1-A ripple current rating are connected in series to get an equivalent value of approximately 15μF.5.2.3

Input Filter

Equation 7shows the required corner frequency of the filter.

where

?f c is the desired corner frequency of the filter

?

f sw is the operatin

g frequency of the power supply (50kHz)

(7)

With reasonable assumption of having 60dB of attenuation at the switching frequency of the power supply,Equation 8determines the cut off frequency of the filter

(approximated to 1kHz)

(8)

Equation 8leads to an inductance of 2mH,which is split in two with 1mH being placed on both the lines of the dc bus.

Figure 9.Input Section

12

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VDD(ON)VDD(OFF)CDD DD

INMAX RUN RUN T V V 218

dt C 1060ms

1100V I I 1.88M R --==m

=??

??

--?÷

?

֏?

è

?

DD 76024100161001610016(2mA 1mA) 1.8750.140.140.083C 9.95F 10F (218)1V

m′m′m′m′??

++++

?֏?=

=m ?m --OUT1OCC1OUT1OCC1OUT1OCC1OUT1OCC1RUN OCC1OCC1OCC1OCC1DD DD(ON)DD(OFF)C V C V C V C V (I 1mA)I I I I C (V V )1V

??

′′′′++++?÷

è?=

https://www.sodocs.net/doc/419767874.html, Component Selection and Circuit Design

5.2.4Surge Protection

Considering 690V ac input with 10%variation,MOV of 750V ac with peak-current rating of 6500A specified for 8/20μsec waveform has been used to suppress surge at the input.For 400-V rated drives,the voltage rating of the MOV needs to be lowered.

5.2.5

VDD Capacitor Selection (C DD )

The capacitance on VDD supplies operating current to the device until the output of the converter reaches the target minimum operating voltage in constant-current regulation.

The capacitance on VDD needs to supply the device operating current until the output of the converter reaches the target minimum operating voltage in constant-current regulation.Now the auxiliary winding can sustain the voltage to the UCC28711device.The total output current available to the load and

available to charge the output capacitors is the constant-current regulation target.Equation 9assumes the output current of the flyback is available to charge the output capacitance until the minimum output voltage is achieved.There is an estimated 1mA of gate-drive current shown in Equation 10and 1V of margin is added to VDD.

(9)

(10)

Figure 10.VDD Capacitor

After C DD has been charged up to the device turn-on threshold (V VDD(on)),the UCC28700device will initiate three small gate drive pulses (DRV)and start sensing current and voltage (see Figure 11).If a fault is detected,such as an input under voltage or any other fault,the UCC28700device will terminate the gate-drive pulses and discharge CDD to initiate an under-voltage lockout.This capacitor will be discharged with the run current of the UCC28700(I RUN )until the VDD turnoff threshold (V VDD(off))is reached.The CDD

discharge time (t CDDD )from the forced soft start is calculated in Equation 11with the controller-run current (I RUN )without out-gate driver switching and the VDD turnoff threshold (V VDD(off))of the controller.If no fault is detected,the UCC28700device will continue driving QA and controlling the input and output currents.No soft start will be initiated.I run =2.1mA V VDD(off)=8V

(11)

13

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LC S1CS D PA

LC P

K R R T N 2591k 0.91300n 18

R 4.44k

L 2.5m

′′′′′′′′=

=

=2

2RCS PRMS CS P I R 0.3340.910.1W

=′=′=CS PPK

0.75

R 0.75I =

=

W V = 21V

VDD(ON)V VDD

V = 8V

VDD(OFF)0V

DRV

3 Initial DRV Pulses After V DD(ON)

Component Selection and Circuit Design https://www.sodocs.net/doc/419767874.html,

Figure 11.Power-ON Sequence

5.2.6

Current Sensing

For this design,a 0.75-?resistor is selected based on a nominal maximum current-sense signal of 0.75V.

NOTE:The actual value shown in Equation 12needs to be tuned based on the allowable power limit

during fault conditions.In this design 0.91-?resistor is used to limit the power less than 65W.

(12)

Equation 13determines the nominal current sense resistor power dissipation.

(13)

The UCC28711device operates with cycle-by-cycle primary-peak current control.The normal operating range of the CS pin is 0.78V to 0.195V.There is additional protection if the CS pin reaches 1.5V.This results in a UVLO reset and restart sequence.

The current-sense (CS)pin is connected through a series resistor (RLC)to the current-sense resistor (RCS).The current-sense threshold is 0.75V for I PP(max)and 0.25V for I PP(min).The series resistor RLC provides the function of feed-forward line compensation to eliminate change in IPP due to change in di/dt and the propagation delay of the internal comparator and MOSFET turnoff time.There is an internal leading-edge blanking time of 235ns to eliminate sensitivity to the MOSFET turnon current spike.The value of RCS is determined by the target output current in constant-current (CC)regulation.The value of R LC is determined by Equation 14.

NOTE:The value determined in Equation 14may require adjustments based on the noise and

ringing on the current sense which is dependent on routing of the signals.1k Ωresistor is used in the design.

where

?R LC is the line compensation resistor ?R S1is the VS pin high-side resistor value ?R CS is the current-sense resistor value

?T D is the current-sense delay including MOSFET turn-off delay.Add 50ns to the MOSFET delay.?N PA is the transformer primary-to-auxiliary turns ratio ?L P is the transformer primary inductance.

?

K LC is the current-scaling constant (equal to 25A/A according to data sheet of UCC28711)

(14)

14

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IN(RUN)S1PA VSL(RUN)V 375

R 92k

N I 18225===?′′

m

https://www.sodocs.net/doc/419767874.html, Component Selection and Circuit Design

Figure 12.Current Sense

5.2.7

Primary-Side Regulation

In primary-side control,the output voltage is sensed on the auxiliary winding during the transfer of transformer energy to the secondary.To achieve an accurate representation of the secondary output voltage on the auxiliary winding,the discriminator (inside UCC28711)reliably blocks the leakage

inductance reset and ringing,continuously samples the auxiliary voltage during the down slope after the ringing is diminished,and captures the error signal at the time the secondary winding reaches zero

current.The internal reference on VS is 4.05V;and VS is connected to a resistor divider from the auxiliary winding to the ground.The output-voltage feedback information is sampled at the end of the transformer secondary-current demagnetization time to provide an accurate representation of the output voltage.Timing information to achieve valley switching and to control the duty cycle of the secondary transformer current is determined by the waveform on the VS pin.It is not recommended to place a filter capacitor on this input,which would interfere with accurate sensing of this waveform.

The VS pin senses the bulk-capacitor voltage to provide for ac-input run and stop thresholds.The VS pin also compensates the current-sense threshold across the ac-input range.The VS pin information is sensed during the MOSFET on-time.For the ac-input run or stop function,the run threshold on VS is 225μA and the stop threshold is 80μA.A wide separation of run and stop thresholds allows clean start-up and shut-down of the power supply with the line voltage.

The VS pin also senses the bulk capacitor voltage to provide for ac-input run and stop thresholds,and to compensate the current-sense threshold across the ac-input range.This information is sensed during the MOSFET on-time.For the ac-input run/stop function,the run threshold on VS is 225μA and the stop threshold is 80μA.A wide separation of run and stop thresholds allows clean start up and shut down of the power supply with the line voltage.

The values for the auxiliary voltage divider upper-resistor RS1and lower-resistor RS2can be determined by Equation 15and Equation 16.

(Rounded off to 91k)

where

?N PA is the transformer primary-to-auxiliary turns ratio ?V IN(run)is the converter input start-up (run)voltage

?

I VSL(run)is the run threshold for the current pulled out of the VS pin during the MOSFET on-time (equal to 220μA max from UCC28711data sheet)

(15)

15

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S1VSR S2AS OCV F VSR R V 91k 4.05

R 30.2k

N (V V )V (0.6624.6) 4.05

′′=

==′+-′-Component Selection and Circuit Design https://www.sodocs.net/doc/419767874.html,

(Rounded off to 30k)

where

?V OCV is the regulated output voltage of the converter

?V F is the secondary rectifier forward voltage drop at near-zero current ?N AS is the transformer auxiliary-to-secondary turns ratio ?R S1is the VS divider high-side resistance

?

V VSR is the CV regulating level at the VS input (equal to 4.05-V typical from UCC28711data sheet)(16)

Figure 13.Primary Feedback

The output over-voltage function is determined by the voltage feedback on the VS pin.If the voltage

sample on VS exceeds 115%of the nominal VOUT,the device stops switching and also stops the internal current consumption of IFAULT,which discharges the VDD capacitor to the UVLO turnoff threshold.After that,the device returns to the start state and a start-up sequence ensues.

Protection is included in the event of component failures on the VS pin.If complete loss of feedback information on the VS pin occurs,the controller stops switching and restarts.

16

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5.2.8MOSFET Gate-Drive

The DRV pin of UCC28711device is connected to the MOSFET gate pin through a series resistor.The gate driver provides a gate-drive signal limited to 14V.The turnon characteristic of the driver is a 25-mA current source,which limits the turnon dv/dt of the MOSFET drain.This reduces the leading-edge current spike,but still provides gate-drive current to overcome the Miller plateau.The gate-drive turnoff current is determined by the low-side driver R DS(on)and any external gate-drive resistance.In order to improve the efficiency and to reduce switching loss in the power device,an external BJT-based current buffer with a higher voltage rating (high Qg)may be used to drive the MOSFETs.

Figure 14.MOSFET Gate Drive

5.2.9

Overvoltage Detection

The LMS33460device is a micropower,under-voltage sensing circuit with an open-drain output configuration,which requires a pull resistor.The LMS33460features a voltage reference and a

comparator with precise thresholds,and built-in hysteresis to prevent erratic-reset operation.This IC generates an active output whenever the input voltage drops below 3.0V.The resistor divider shown in Figure 15is derived with 1200V dc as the over-voltage trip point.Zener diode D32is used to clamp the input voltage at LMS33460to less than 8V (absolute max of the device)when the dc bus voltage is at its max of 1200V dc.

The device has a minimum hysteresis voltage of 100mV,which translates to approximately 11V on the dc bus.Hysteresis can also be adjusted with R29.

Figure 15.Undervoltage Protection

17

TIDU412A–September 2014–Revised November 2014400-to 690-V AC Input 50-W Flyback Isolated Power Supply Reference

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OUT PPK MIN MAX 2P 250W

I 1A

Vin D 0.83750.335′′===h ′′′′MAG OUT DG MAX MIN AON RCS 12D (V V )120.42524.6

D 0.335Vin V V 37550.75

′′+′′=

==---

-P MAX MIN AON RCS S MAG OUT DG N D (Vin V V )a112

N D (V V )

′--====?′+

Component Selection and Circuit Design https://www.sodocs.net/doc/419767874.html,

The UCC28711device has an NTC input,which can be used to interface an external negative-temperature-coefficient resistor for remote temperature sensing to allow user-programmable external

thermal shutdown.The shutdown threshold is 0.95V with an internal 105-μA current source,which results in a 9.05-k Ωthermistor shutdown threshold.

Pulling the NTC pin to low shuts down the PWM action.The signal from LMS33460is interfaced to the NTC pin to shut down the controller during over voltage.5.2.10

HV Startup

The UCC28710device has an internal 700-V start-up switch.Because the dc bus can be as high as

1200V dc,an external Zener voltage regulator is used to limit the voltage at the HV pin to about 550V dc.The typical startup current is approximately 300μA,which provides fast charging of the VDD capacitor.The internal HV start-up device is active until VDD exceeds the turnon UVLO threshold of 21V at which time the HV start-up device is turned off.In the off state,the leakage current is very low to minimize

standby losses of the controller.When VDD falls below the 8.1-V UVLO turn-off threshold,the HV start-up device is turned on.

Figure 16.Start-Up Circuit

For drives with two capacitors connected in series in the dc link,the midpoint of the series can be

connected to the HV pin of the UCC28711device.The midpoint voltage will vary from 200V to 600V (for an input of 400V dc to 1200V dc),which would be within the limit of 700-V start-up switch of UCC28711.5.2.11

Transformer Calculations

Equation 17shows the calculation for the transformer turns ratio primary to secondary (a1)based on volt-second balance.

where

?L SM is the secondary magnetizing inductance

?V AON =5V,estimated voltage drop across FET during conduction ?V RCS =0.75V,voltage drop across current sense resistor

?

V DG =0.6V,estimated forward voltage drop across output diode

(17)

Equation 18shows the calculation for maximum duty cycle (D MAX ).

(18)

Equation 19shows the calculation for the transformer primary-peak current (I PPK )based on a minimum

flyback input voltage.

(19)

18

400-to 690-V AC Input 50-W Flyback Isolated Power Supply Reference

TIDU412A–September 2014–Revised November 2014

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OUT1FDG DG1OUT P V 450.88

P 1.65W

V 24

′′===DG1PK S1PK I I 8.6A

==INMAX RDG1OUT1V 1200

V V 24124V

a112=+=+=OUT AUX _PK OUT MAG P 230

I (16V Output) 4.25A

V D 16.60.425

′=

==′′OUT S3PK OUT MAG P 21

I (6V Output)0.357A

V D 6.60.425

′±=

==′′OUT S2PK OUT MAG P 29

I (16V Output)0.638A

V D 33.20.425

′±=

==′′OUT S1PK OUT MAG P 290

I (24V Output)8.6A

V D 24.60.425

′===′

′PRMS PPK

I I 10.334A ==′=DDMIN DE A S OUT DG V V N

160.3a20.66N V V 24.6

++==

==+OUT PM 22PPK MAX 2P 250W

0.8L 2.5mH

I F 150kHz ′′h

===′′https://www.sodocs.net/doc/419767874.html, Component Selection and Circuit Design

Equation 20shows the calculation for the selected primary magnetizing inductance (L PM )based on minimum flyback input voltage,transformer,primary peak current,efficiency,and maximum switching frequency (f MAX ).

(20)Equation 21shows the calculation for the transformer auxiliary to secondary turn ratio (a2).

where

?V DDMIN =16V

?

V DE =0.3V,estimated auxiliary diode forward voltage drop

(21)

Equation 22shows the calculation for the transformer primary RMS current (I PRMS ).

(22)

Equation 23through Equation 26show the calculations for the transformer secondary peak current RMS current (I SPK ).

(3.23A rms )

(23)

(0.24A rms )

(24)

(0.134A rms )

(25)

(1.6A rms )

(26)

5.2.12Output Diodes

5.2.12.1

+24V Output Diode (D G1)

Equation 27shows the calculation for the diode reverse voltage (V RDG ).

(27)

Equation 28shows the calculation for the peak output diode (I DGPK ).

(28)

For this design,Schottky diode of 20A,200-V rating with a forward voltage drop (V FDG )of 0.88V is used.V FDG =0.88V

Equation 29calculates the estimated diode power loss (P DG ).

(29)

19

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COUT _RMS _16V I 640mA =

COUT _RMS _24V I 2.6A =

COUT _RMS

I =OUT _AUX 15

20162

C 120F

0.1m′

′3=?m OUT _6V 0.52062

C 120F

0.01m′

′3=?m OUT _16V 4.5

20162

C 120F

0.025m′

′3=?m OUT OUT OUT _24V ripple P 45

2020V 2242

C 750F V 0.025m′m′

′′3

==?m ripple COUT _24V SPK V 0.9250m 0.9

ESR 26m I 8.6A ′′===?W

AUX _OUT FDG2DG2AUX _OUT P V 150.875

P 0.82W

V 16

′′===INMAX RDG2AUX _OUT V 1200

V V 16116V

a112=+=+=Component Selection and Circuit Design https://www.sodocs.net/doc/419767874.html,

5.2.12.2

+16V Auxiliary Output Diode (D G2)

Equation 30shows the calculation for the diode reverse voltage (V RDG ).

(30)Equation 31shows the calculation for the peak output diode (I DG2PK ).

I DG2PK =I AUX_PK =4.25A (1.6A rms )

(31)

For this design a 3A,200-V super-fast rectifier (MURS320-13-F)with a forward voltage drop (V FDG )of

875mV at 3A was selected.

Equation 32determines the estimated diode power loss (P DG2).

(32)

The same diode has been used for ±16V output and isolated +6V output.5.2.13

Output Capacitors

Equation 33shows the calculation for selecting the output ESR based on 90%of the allowable output

ripple voltage.

(33)Equation 34through Equation 37show the calculations for selecting the output capacitors,which was

selected based on the required ripple voltage requirements.

(34)

(35)(36)

(37)Equation 38shows the calculation for estimating the total output capacitor RMS current (I COUT_RMS ).

(38)

(39)

Two 330μF,35-V aluminum-electrolytic capacitors with ripple-current ratings of 1.43A are connected in

parallel at the output diode to support the ripple current.

(40)

A 120μF,50-V capacitor with a ripple-current rating of 1.6A is connected at both +16V and –16V

outputs.

20

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