TI芯片TRF796x模块固件描述
Application Report
SLOA134–March2009 Firmware Description of the TI TRF796x Evaluation
Module(EVM) ShreHarsha Rao
ABSTRACT
This application note discusses the firmware implemented in the MSP430F2370(a
16-bit ultra-low power microcontroller from the TI MSP430family)used with Texas
Instruments’TRF796x,a fully integrated13.56MHz radio frequency identification
(RFID)analog front end and data framing reader system.
This document is designed for use by customers who are experienced with Radio
Frequency Identification Devices(RFID)and firmware development and want to
develop their own application using the TRF796x.This reference guide should be used
in conjunction with the ISO15693,ISO14443A/B standards,which specify the standard
protocol,commands and other parameters required for communication between the
transponder and the reader.
Contents
1Abbreviated Terms (3)
2Introduction (3)
3Basic Program Flow (4)
3.1Stack Manipulation (4)
4Interupt Handler Routine (7)
5Anti-Collision Sequences (12)
5.1Anti-Collision Sequence for ISO15693 (12)
5.2Anti-Collision Sequence for ISO14443A (15)
5.3Anti-Collision Sequence for ISO14443B (18)
5.4Anti-collision Sequence for Tag-it? (19)
6Graphical User Interface (22)
7FIFO (23)
8References (24)
List of Figures
1System Block Diagram (3)
2Disassembly Window (5)
3main (6)
4Interrupt Handler Routine(1) (9)
5Interrupt Handler Routine(2) (10)
6Interrupt Handler Routine(3) (11)
7Inventory Request(1) (13)
8Inventory Request(2) (14)
9Anti-Collision Loop A(1) (16)
10Anti-Collision Loop A(2) (17)
11Anti-Collision Loop B (18)
12TI Inventory Request(1) (20)
13TI Inventory Request(2) (21)
14GUI Mode (22)
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List of Tables
1Interrupt Conditions (7)
2IRQ Status Register (7)
3Data Frame (22)
4Host Commands to TRF796x (23)
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1Abbreviated Terms 2
Introduction
https://www.sodocs.net/doc/5f14206320.html, Abbreviated Terms The following abbreviations are used:
GUI-Graphical User Interface
NVB-Number of Valid Bits
PCD-Proximity Coupling Device
PICC-Proximity Integrated Circuit Card
SPI-Serial Peripheral Interface
UID-Unique Identifier
UART-Universal Asynchronous Receiver Transmitter
VCD-Vicinity Coupling Device
VICC-Vicinity Integrated Circuit Card
The TRF796x is an integrated analog front end&data framing system for a13.56MHz RFID reader
system.Built-in programming options make it suitable for a wide range of applications both in proximity and vicinity RFID systems.The reader is configured by selecting the desired protocol in the control
registers.Direct access to all control registers allows fine tuning of various reader parameters as needed.
The TRF796x can be interfaced to a microcontroller such as the MSP430F2370through a parallel10-pin interface(I/O-0to I/O-7,IRQ and Data Clock)or a4-wire SPI(serial)interface as shown in Figure1.The MCU is the master device and initiates all communication with the reader.The anti-collision
(as described in the ISO standards14443A/B,15693and Tag-it?)are implemented in the MCU firmware to help the reader detect and communicate with one PICC/VICC among several PICCs/VICCs.The MCU is also used for communication(through a UART)to a higher level host station which is normally a
personal computer.The user can send the desired commands to the MCU through the GUI.The MCU interprets the data received and sends appropriate commands to the TRF796x.
This document discusses the firmware implemented in the MSP430F2370.The firmware has been
developed using the IAR Embedded Workbench V3.41A.
Note:It is recommended that the user initially review the ISO standards14443A/B15693.
Figure1.System Block Diagram
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The MCU clock is provided by the SYS_CLK output of the reader.On power up,an auxiliary clock signal (60KHz)is made available on the SYS_CLK output.When the main reader enable pin EN is set high,the supply regulators are activated and the13.56MHz oscillator is started.When the supplies are settled and the oscillator frequency is stable,the SYS_CLK output is switched from the auxiliary frequency of60KHz to the selected frequency derived from the crystal oscillator.All peripherals(UART,etc.)are initialized and parallel/SPI interface is chosen(Note:The sample code given uses the parallel interface).At this point, the reader is ready to communicate and perform the required tasks.
The firmware is capable of running in two modes,the stand-alone mode and the GUI mode.
In the stand-alone mode,the firmware automatically detects tags on connecting the EVM to a USB port.
The MCU writes appropriate bits to the Chip Status Control Register and the ISO Control Register in the TRF796x to select the operation mode.It then executes the anti-collision sequence(as described in the ISO standards)in order to obtain the UIDs of all the PICCs/VICCs detected.This is done in the FindTags() function(in file main.c)which as the name implies,looks for tags of protocols15693,14443A/B and
Tag-it?in a sequence.This loop is executed repeatedly until any data is received from the PC through the UART.Once any data is received in the UART Receive buffer of the MCU,the firmware enters the GUI mode.Program execution jumps to the second loop and depending on the data received in the UART buffer,the MCU sends commands to the12-byte FIFO buffer in the TRF796x.The two modes are
represented in Figure3.
3.1Stack Manipulation
The switch to the GUI mode from the Stand-alone mode is done via a stack manipulation procedure.
When the UART RX buffer receives the first SPI data,it raises an interrupt.The interrupt processing
begins at this point.The Program Counter(PC),which points to the next instruction,is pushed to the stack by the interrupt logic.Then the interrupt logic loads the address of the UART Interrupt Service Routine (ISR)to the PC and program execution continues from there.In the UART ISR,the portion of the stack that holds the address of the instruction to which the ISR should return is overwritten with the address of the function HostCommands.Thus at the end of the UART ISR,this new address pops from the stack and the program execution automatically starts from the HostCommands function and waits for the rest of the SPI data to be received from the GUI.
For example,consider the following piece of code:
#pragma vector=USART0RX_VECTOR
__interrupt void RXhandler(void)
{
.
.
if(FirstSPIdata)
{
asm("mov.w#HostCommands,10(SP)");
}
}
For this particular implementation of the ISR,the address to which the ISR should return to is at an offset of10from the stack pointer.This offset will vary depending on the implementation of the UART RX ISR.
The offset can be calculated by looking at the number of POP instructions preceding the RETI instruction in the Disassembly Window of the IAR Embedded Workbench.
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Figure2.Disassembly Window
In Figure2,there are four POP WORD instructions before the RETI.This means that4x2=8bytes
(1bytes)need to be popped from the stack before the PC could be loaded with the return
address.Thus it can be seen that the10th byte from the Stack Pointer needs to be overwritten with the address of the function HostCommands.
The firmware implementation details of the anti-collision procedure for each standard are explained in
Section5.
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Figure 3.main
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https://www.sodocs.net/doc/5f14206320.html, Interupt Handler Routine 4Interupt Handler Routine
Before delving into the details of each anti-collision sequence,understanding of the Interrupt Service
Routine Handler is important.
The reader which is a slave device has an IRQ pin to prompt/flag the MCU for attention in cases when the reader detects a response from the PICC/VICC.The Interrupt Handler Routine described below
determines how the IRQ should be handled.
The TRF796x IRQ status register(Table2)is read to determine the cause of the IRQ.The following
conditions(Table1)are checked actions taken:
Table1.Interrupt Conditions
CONDITION ACTION
Transmission complete Reset FIFO
1.Read Collision Position Register(in the TRF796x).
2.Determine the number of valid bytes and bits.
Collision occurred
3.Read the valid received bytes and bits in FIFO and write to local buffer.
4.Reset FIFO.
1.Read FIFO Status Register(in the TRF796x)to determine the number of unread bytes and
bits in the FIFO.
RX flag set
2.Read the data in FIFO and write to local buffer.
3.Reset FIFO.
1.Read9bytes from FIFO.
RX active and9bytes in FIFO
2.Check if IRQ pin is still high.If yes,go to condition#
3.
CRC error Set error flag
Byte framing error Set error flag
No-reponse time-out-
1.Reset FIFO.
Any other
2.Clear interrupt flag.
Table2.IRQ Status Register
BIT NO.BIT NAME FUNCTION COMMENTS
Signals in the TX are in progress.The flag is set at the start of TX,but B7Irq_tx IRQ set due to end
the interrupt request is sent when TX is finished.
Signals that RXZ SOF was received and RX is in progress.The flag is B6Irg_srx IRQ set due to RX start set at the start of RX,but the interrupt request is sent when RX is
finished.
Signals the FIFO
B5Irq_fifo Signals FIFO high or low(less than four or more than eight).
is1/3>FIFO>2/3
B4Irq_err1CRC error Reception CRC
B3Irq_err2Parity error
B2Irg_err3Byte framing or EOF error
B1Irq_col Collision error For ISO14443A and ISO15693single sub-carrier.
B0Irq_noresp No response interupt Signal to MCU that the next slot command can be sent.
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Interupt Handler Routine https://www.sodocs.net/doc/5f14206320.html, Note: 1.Though registers0Dh and0Eh give the collision position,only register0Eh is used
because the Anti-collision command in ISO14443A is maximum only7bytes long.Hence8
bits(0Dh)are enough to determine the position.
2.The lower nibble of the Collision register(0Eh)has the bit count and the upper nibble has
the byte count.For example,if the collision position register holds the value0x40,it means
that the collision happened in the4th byte on the bit0.
3.The anti-collision procedure in the ISO14443A standard is done in such a way,that the
reader sends at least2bytes(Cascade level and length information)in the Anti-collision
command.The collision position is counted from this reader command on.Therefore to know
the number of valid bytes and bits,subtract0x20from the Collision Position register.
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Figure4.Interrupt Handler Routine(1)
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Figure5.Interrupt Handler Routine(2)
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Figure6.Interrupt Handler Routine(3)
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The following sections describe the anti-collision sequences that are to be executed for the corresponding standards.
5.1Anti-Collision Sequence for ISO15693
Anti-collision algorithm:
1.The reader sends a mask value and number of slots along with the inventory request.The number of
slots can be1or16.
2.The VICC compares the least significant bits of its UID to the slot number+mask value.If it matches,
it sends a response.If number of slots is1,comparison is made on mask value only.
3.If only one VICC responds,then there is no collision and the VCD receives the UID.
4.If the reader detects a collision,it increments the slot pointer and makes note of the slot number in
which collision occurred.
5.The reader sends an EOF to switch to the next slot.The VICC increments its slot counter on reception
of EOF.
Steps1-4are repeated for all16slots.
At the end of16slots,the reader examines the slot pointer contents.If it is not zero,it means that collision has occurred in one or more slots.
To determine new mask value:
1.Increment the mask length by4.
2.Calculate New mask=Slot number(in which collision occurred)+old mask.
3.Decrement slot pointer by1.
Repeat from start with the new mask value until slot pointer is zero.
Note:Due to the recursive nature of the algorithm,there is a risk of stack overflow when collision
occurs.It is highly recommended that the user implement stack overflow check in the
firmware.
A detailed description of the firmware implementation of the anti-collision sequence is given in Figure7
and Figure8in the form of a flowchart:
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Figure7.Inventory Request(1)
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Figure8.Inventory Request(2)
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The anti-collision loop for14443A is as follows:
1.The PCD sends the Anti-collision command with NVB=0x20.
2.All PICCs will respond with their UIDs.
3.If more than one PICC responds,there will be collision.If there is no collision,steps4-8should be
skipped.
4.The PCD then reads the Collision Position Register to determine the number of valid bytes and bits
and reads the valid data from the FIFO.
5.The PCD assigns the value of the Collision Position Register to NVB.
6.The PCD transmits the Anti-collision command with the new NVB followed by the valid bits.
7.Now only the PICCs of which part of the UID is equal to the valid bits transmit the remaining bits of the
UID.
8.If again collision occurs,steps4-7are repeated.
9.If no collision occurs,PCD transmits SELECT command with NVB=0x70followed by the complete
UID.
10.The PICC which UID matches responds with a SAK message.
11.The PCD checks for the cascade bit in the SAK.If set,steps1-9are executed with the appropriate
SELECT command.
Note: 1.The lower nibble of the Collision register(0Eh)has the bit count and that the upper nibble
has the byte count.For example,if the Collision position register holds the value0x40,it
means that the collision happened in the4th byte on the bit0.
2.The Anti-collision procedure in the ISO14443A standard is done in such a way that the
reader sends at least2bytes(Cascade level and length information)in the Anti-collision
command.The collision position is counted from this reader command on.Therefore to know
the number of valid bytes and bits,subtract0x20from the Collision Position register and
NVB.
3.The NVB is similar to the Collision Position Register.The lower nibble of the NVB has the
bit count and that the upper nibble has the byte count.For example,if the NVB holds the
value0x52,it means that there are5valid bytes and3valid bits.
4.The possible values of SELECT command are0x93,0x95and0x97corresponding to
different cascade levels.
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Figure9.Anti-Collision Loop A(1)
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Figure10.Anti-Collision Loop A(2)
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5.3Anti-Collision Sequence for ISO14443B
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The anti-collision sequence for 14443B follows the slotted Aloha approach:
1.The PCD sends REQB command with parameter N which specifies the number of slots.
2.Each PICC generates a random number R in the range from 1to N.
3.The PCD sends a Slot-Marker command during every time slot.
4.The PICC responds only if R matches the slot number.Otherwise,it sends no response.
5.When multiple PICCs respond,the PCD makes note of the collision.The PCD generates a new N and steps 1-4are repeated.
Figure 11.Anti-Collision Loop B
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The anti-collision algorithm for Tag-it?is the same as that of ISO15693except that the number of slots is fixed(16).
Anti-collision algorithm:
1.The reader sends a mask value along with the inventory request.The number of slots is always16.
2.The VICC compares its UID to the slot number+mask value.If it matches,it sends a response.
3.If only one VICC responds,then there is no collision and the VCD receives the UID.
4.If the reader detects a collision,it increments the slot pointer and makes note of the slot number in
which collision occurred.
5.The reader sends an EOF to switch to the next slot.The VICC increments its slot counter on reception
of EOF.
Steps1-4are repeated for all16slots.
At the end of16slots,the reader examines the slot pointer contents.If it is not zero,it means that collision has occurred in one or more slots.
To determine new mask value:
1.Increment the mask length by4.
2.Calculate New mask=Slot number(in which collision occurred)+old mask.
3.Decrement slot pointer by1.
Repeat from start with the new mask value until slot pointer is zero.
A detailed description of the firmware implementation of the anti-collision sequence is given in Figure12
and Figure13.
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Figure12.TI Inventory Request(1)
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