QFN-Solving Wire Bond Process Challenges
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Solving Wire Bond Process Challenges
For QFN Packaging
Eric McDivitt
Kulicke & Soffa
2101 Blair Mill Road Willow Grove, PA 19090emcdivitt@https://www.sodocs.net/doc/721461961.html,
Abstract
The handheld consumer market is aggressive in the miniaturization of electronic products.Driven primarily by the cellular phone and digital assistant markets, manufacturers of these devices are challenged by ever shrinking formats and the demand for more PC-like functionality.Additional functionality can only be achieved with higher performing logic IC’s accompanied by increased memory capability. This challenge,combined together in a smaller PC board format,asserts pressure on surface mount component manufactures to design their products to command the smallest area possible.
Many of the components used extensively in today’s handheld market are beginning to migrate from traditional leaded frame designs to non-leaded formats. The primary driver for handheld manufacturers is the saved PC board space created by these components’ smaller mounting areas. In addition, most components also have reductions in weight and height, as well as an improved electrical performance. As critical chip scale packages are converted to non-leaded designs, the additional space saved can be allocated to new components for added device functionality.
The benefits of incorporating non-leaded technology into surface mount designs are not limited to the OEM. Component manufacturers also benefit from an increase in production productivity and lower packaging cost.Additionally, since non-leaded designs can use many existing leadframe processes, costs to convert a production line can be minimized.Similar to leaded components, nonleaded designs use wire bond as the primary interconnection between the IC and the frame. However, due to the unique land site geometry and form factor density, traditional wire bond processes may not produce high yielding production. For these designs, additional wire bond capabilities and alternate processes are needed to produce acceptable production yields. This paper discusses the challenges of wire bond for QFN package designs and describes how new wire bond capabilities and process optimization can improve production yields.
Introduction
Handheld device manufacturers continue to require surface mount components to occupy the least board space possible. By doing so, this allows designers to incorporate additional functions within a device without increasing the overall size of the device. The introduction of
Quad Flat Non-leaded frames now provides manufacturers with an ability to significantly reduce the finished size of a surface mounted component.
Component manufacturers have begun to convert many designs to quad flar non-leaded (QFN) format due to the significant cost savings provided. By widening the frame strip and increasing site density, manufacturers can process a larger number of units through the production line and improve assembly efficiency. In addition, each unit occupies a smaller finished volume, reducing the amount of material and providing a cost savings per package.
Due to the benefits provided to both equipment device designers and component manufacturers, it is evident why QFN packaging has begun to gain significant acceptance within the semiconductor industry. Estimates from VLSI, currently gauge QFN production volume at less than 1% of Surface Mounted Packages. Future five-year annual growth rates are expected to exceed 80% [1]. As designs continue to convert from traditional small outline (SO) and quad flat pack (QFP) type packages, it will be necessary to further adapt production processes to handle all variations of QFN packaging. Wire bond is expected to remain the primary connection method for QFN packaging. This paper will discuss the process challenges and recommendations to improve yields when wire bonding those QFN package designs used in manufacturing today.
Design Differences
The major difference in the design is attributed to how the finished package is connected to a printed circuit board. These components do not require formed perimeter leads typically used to connect SO or QFP style packages to the PC board. Instead, exposed land-site areas located on the underside of the package, provide solder site locations within the encapsulation perimeter, reducing the package area and allowing an increase in strip density. While the cost and efficiency benefits of using QFN substrates in assembly are attractive, they do not come for free. Existing equipment and processes used in assembly may need to be modified to accommodate QFN leadframe. In some instances, this may only require parameter changes to existing processes, but in other cases it will demand more in-depth changes in order to provide production worthy solutions.
The cross sections shown in Figure 1 highlight the board level connection differences between a QFP and QFN package. By exposing a terminal to the underside of the component, a significant savings in package area can be gained. The ‘Gull-Wing’ terminals on the perimeter of the component can be eliminated and replaced by solder ball connections contained inside the package perimeter. In addition to reducing the mounted foot print of the component, the electrical path from the IC to the PC board is shorter in length, improving parasitic effects and boosting communication to and from the IC. Package size reduction from QFN design is one aspect that provides more efficient use of the area on PC boards. There are additional benefits providing more efficient use of an area already occupied by a surface mounted component. Figure 2 illustrates how QFN design can replace
Gull-Wing
Lead
a leaded device and use a larger IC, without increasing the required surface mount area. This allows additional functions to be incorporated within an existing design without sacrificing mounting area.
Manufacturing Overview
Matrix manufacturing processes are preferred over conventional leadframe methods, when packaging QFN designs. By allowing leadframes to be manufactured within a matrix array, a larger number of devices are processed along each stage of production. This reduces the time spent indexing material through the line, which improves tool utilization. Manufacturers are beginning to standardize strip dimensions, which will allow tools within a line to require less set up and modification between product lots. In addition, as the matrix density increases, the average amount of material used within a device is reduced. This increases the number of packaged devices per leadframe,
minimizing the amount of scrap generated [2]. QFN substrates incorporate the highest matrix density for production. For manufacturers, these frame designs provide improved production efficiency by increasing productivity per square foot. As Figure 3 illustrates, matrix formats allow conventional, time intensive processes, such as mold, trim, and test, to be substantially shorter by performing these processes on a large group of devices versus a single unit. The advantages are significant to manufacturers as they provide higher throughput levels, reduced cost, and increased tool utilization.Wire Bond Process Challenges
Wire bond is the primary method of interconnection used by all IC manufacturers and will continue to remain so for QFN packaging. Unlike leaded frames however, characteristics of QFN frames provide a unique set of challenges when compared to traditional wire bond processes. To better understand those issues related to wire bonding QFN packages, it is necessary to compare it to traditional leadframe processes.
Clamping: Leaded and non-leaded frames can be manufactured in matrix form factors, but the primary difference affecting the wire bond process is the matrix density. Leadframe designs have accompanying clamp-plate hardware used to secure the leads and prevent displacement
(Courtesy of Amkor Technology)
Matrix and Conventional Leadframes.
during crescent bond formation, as shown in Figure 4. Wire bonder clamp-plates can be manufactured for single or matrix leadframe designs, provided there is sufficient index pitch between IC devices. As strip density increases however, like in QFN substrates, the pitch becomes too small to support mechanical clamping. For these cases, clamping may only be applied to the perimeter of the matrix, leaving interior land-sites unclamped.
Attempting to wire bond on unclamped surfaces will result in poor bond formation. Both tape and tapeless processes for QFN have identifiable effects on bond quality.
Dynamics: Polyimide ‘tape’ is used to mask the underside of the land-sites during encapsulation,providing a protective barrier around the terminal surface. Today, there are processes to add the tape backing to the QFN frame prior to wire bond. Although the tape can help dampen vibrating land sites during ultrasonic bonding, it becomes compliant due to elevated temperatures and allows the lead to deflect when bond forces are applied. Figure 5 clearly shows the resulting effect to a tail bond when inconsistent force is applied.
Design: Tail bond results shown in Figure 5 are known to be an effect of land-site displacement during wire bond. This, however is not the only contributing factor to poor tail bond results.Wire bond process results indicate that the width of the tie-bar and the etch depth to the underside of the land-site can also have significant impact on tail bond performance.
In an effort to better understand the dynamics of land-sites and tie bars during wire bond,mechanical modeling has been used for some QFN designs to determine the interaction on
Figure 4. Wire Bond Clamping for Single IC Site.
Figure 5. Tail Bond Distortion Caused by Land-Site Deflection..Thickness
Width
neighboring sites. Element analysis shown in Figure 7 implies that the surrounding sites are also displaced by some amount when bonding forces are applied. More specifically, the adjacent land-site sharing the same tie bar location, but belonging to the neighboring IC device, will experience the second highest level of displacement when compared to the land-site under bond force. This becomes a primary concern when wire bonding individual IC sites within a high matrix density. If the forces applied during wire bond can be transmitted to a completed but neighboring site, there is a tendency for already bonded wires to be directly affected. Such complex inter-device dynamics can degrade both loop height repeatability and stitch pull standard deviation.
Process: Wire bond process challenges also exist for those QFN frames not outfitted with polyimide tape during wire bond. With the tape removed, the tie bar and land-sites can be supported directly by the heater block. This provides a sturdy surface to apply bond forces with approximately zero deflection. Unlike the taped frames however, the tapeless types are effected by ultrasonic vibration. Since all of today’s wire bonder equipment incorporates ultrasonic generators to aid and speed wire bond processes, it is critical to understand the sensitivity of each individual frame design. This becomes increasingly important when the wire
diameter used within a device is increased above 1.0mil, typical for some power and RF applications. The larger wire is stiffer and can translate vibration more efficiently than small wire diameters. Additionally, if the interconnection length is relatively short (less than 65 mils), loop stiffness and vibration transmission can increase. Combined or separate, these package attributes can have a negative effect on the first ball neck. Figure 8shows an instance where the neck becomes severely damaged by those parameters used for tail bond.
The increased wire bond parameters, combined with a short, stiff loop allow ultrasonic vibrations to transmit from the tail bond, through the loop to first bond.
Materials: Similar to standard leadframes, QFN frames use copper as a base metal with silver or nickel-palladium flashed land-sites. Although wire bond processes for each frame type require unique parameters in order to optimize bond strength, the tail bond process is sensitive to the consistency of the flashing composition applied to the land-site. Figure 9 illustrates spectroscopy
Figure 7. Variable Land-Site.
Figure 8. Ball Bond Neck Damage Caused
by Improper Tail Bond Parameters.
results from two different lots of Pd/Ni QFN frames. The Black trace indicates the composition levels of nickel, gold, and palladium from Lot 1, which produced strong tail bond pull strengths and Cpk results greater that 2.0. Lot 2 had a significantly different composition, also shown in Figure 9 by the Red shaded area. Tail bond performance for this 2nd lot of material resulted in a lower standard deviation, approximately 1.4grams and Cpk less than 1.33.
In addition to pull strength and Cpk differences, the aesthetics in the tail bond quality can be seen visually. Figure 10 shows the corresponding tail bond formations produced on those frame compositions highlighted in Figure 9.
All of the wire bond challenges described can have interdependent relationships. Quality wire bond results are a collection of inputs optimized for a specific QFN design. Tail bond performance, which is the primary cause for low yielding QFN processes, can be improved by studying and understanding how package materials, design, manufacturing processes, and dynamics affect wire bonding.Higher Yielding Processes
To address many of the reliability concerns described in the Wire Bond Process Challenges section of this paper, it will first be necessary to categorize the root causes and determine which portions of the wire bond process can be modified to compensate and improve yields. Due to matrix density, some types of QFN frames cannot use standard clamping hardware to secure land-sites. This means that the stability of the lead during wire bond is dependent on the system it is mechanically connected to. For QFN frames using polyimide during the wire bond process, this can create an additional challenge due to the compliance of the tape, allowing the land-site to deflect. The main concern for QFN frames processed without the polyimide tape is land-site vibration, which may weaken first bond neck.
Bond surface displacement, although it is not preferred during wire bonding, is not the primary cause for the inconsistent pull strength results. The poor result is a function of inconsistent bond force during tail bond. In addition, for tapeless frames, neck damage may be caused by ultrasonic vibration, which can be eliminated by compression bonding techniques instead of an ultrasonic process. For both frame types however, high tail bond force will allow the land-site to compress the polyimide tape, providing a stable and consistent bonding
55% Less 20% More
Figure 9. Spectroscopy Composition for 2 Lots
of NiPd QFN.
Figure 10. NiPd QFN Producing
Acceptable Tail Bond Results. Lot 1 : Cpk > 2.00
surface. In addition, ultrasonic energy can be reduced since there is a natural tendency for ultrasonic dampening to occur during high force processes, eliminating first bond neck damage.QFN devices are not limited to fine wire applications only. Power and RF devices are also being wire bonded on QFN substrates and using wire diameters up to 2.0mils. Since tail bond force is scaled according to wire diameter,for larger wire processes, tail bond force could require forces of up to 700grams for wire bond.In performing thermal compression bonding,force is only one important component in producing reliable tail bonds. Careful consideration is also needed for the other critical parameters, such as time and temperature.Since many of the QFN designs are using standard 70mm by 250mm frame sizes, uniform temperature across the entire area is essential to tail bond strength consistency. Device area for these larger matrixes exceeds many of the array CSP’s and QFP packages being bonded today,placing special needs on the wire bonder to provide uniform heat to a large bond area. In addition, for those QFN manufacturing processes requiring polyimide tape during the wire bond process, temperature can also be adversely effected. Specifically, the tape is an added barrier layer between the wire bonder heating
source and the substrate/IC. Depending on the thermal conductivity of the tape or its ability to efficiently transmit heat, temperature will need to be increased to compensate.
Time is the final parameter having a strong correlation to improving tail bond performance for QFN substrates. In general, a nickel palladium surface is more difficult to wire bond when compared to silver. However, thermal compression bonding typically has longer bondtime parameters when compared to an ultrasonic process, producing little difference in bondtime between NiPd and Ag. For those tests performed, average bond time was optimized to 20msec.
A second effect from time was observed that correlated to an increase in tail bond pull strength. Post bond time, or the amount of time a tail bond is exposed to heat after it has been formed, has a significant influence pull strength.Figure 12 highlights pull strength results for multiple ‘bond-bake’ periods. On average, there was an increase in both Cpk and mean pull values.
The above process improvements have provided significant improvement in the reliability of the tail bond process. This however, is only a viable solution if it can support production volumes.The process recommendations above have been tested within production environments for a
Figure 12. Increased Tail Pull Strength
from Post Bond Heating.Figure 11. Ball Bond Example Showing
No Neck Damage.
number of QFN designs. Although reliability results have met manufacturing standards,capillary life, in some instances, did not.
Many manufacturing facilities require minimum capillary life for those processes in production.Depending on die or substrate materials, the target life, specified in ‘bonds or touch-downs’,will fluctuate.
Since many of the QFN substrates require higher bond force, compared to typical leadframe processes, it is recommended to use a capillary design that can withstand abuse. As mentioned earlier, some large wire processes can require up to 700grams of bondforce, which could eliminate the capillary tip features in a short amount of time.
Figure 14 is an example of some of the attributes a capillary for QFN bonding should have. To begin, TBR or tail bond reinforced type
capillaries have default dimensions that will help improve pull strength, as well as capillary life. If further capillary optimization is needed, face angle will improve capillary life and crescent bond strength. This has a significant effect on how much area bond force will be distributed across.
Conclusions
Due to the unique land-site dimension,dynamics, and composition, wire bonding to QFN substrates can be challenging.Manufacturing processes with the use of polyimide tape can further add to the challenge of developing a high yielding production process. It has been determined that thermal compression bonding techniques can minimize dynamic disturbances to the substrate/IC and improve mean pull strength and Cpk for the crescent bond. In addition, a strong correlation between post bond curing and pull strength has been discovered, which indicates that a significant increase in tail bond strength can be achieved within a short curing period. Finally,capillary life can be heavily affected by the aggressiveness of the wire bond process. When designing a capillary for high force applications,consideration is necessary for those features that distribute bond force at the capillary tip. Tail Bond Reinforced capillaries are an example which incorporate these principles and maintain consistent crescent pull strength.
References
1. VLSI RESEARCH INC; Doc: 327036v1.10,Vol. D1.1, T
2.2.2, 10/01s
2. Matrix Assembly and Test, by Scott Voss
July 2001
Figure 13. Strong Crescent Bond SEM.Figure 14. Example of TBR Capillary.
Acknowledgments
The author would like to give special thanks to James Loftin and Jovy Sena, for their extensive process work needed to characterize the processes described within this paper. In addition, thanks is also given to Mark Klossner and Walt Frausch for their valuable input and contributions.