C8051F040中文资料

VDD VDD VDD DGND DGND DGND /RST

XTAL1XTAL2P2.0/CPx P2.7/CPx

P0.0P0.7

DAC1

AIN0.0AIN0.1AIN0.2AIN0.3

DAC0VREF MONEN

VREFD VREF0P5.0/A0P5.7/A7P6.0/A8P6.7/A15P4.5/ALE P4.6/RD P4.7/WR P4.4

HVAIN+

HVAIN-HVREF HVCAP

CRX0

CTX0P3.0/AIN0.6P3.7/AIN0.7P1.0/AIN1.0P1.7/AIN1.7

VREF2

P4.0

P7.0/D0P7.7/D7

AV+TCK TMS TDI TDO AGND AGND AGND AV+AV+

ANALOG PERIPHERALS

12-bit ADC

- ±1LSB INL; Guaranteed Monotonic

- Programmable Throughput up to 100ksps

- 12 External Inputs; Programmable as Single-Ended or Differential - Programmable Amplifier Gain: 16, 8, 4, 2, 1, 0.5 - Data Dependent Windowed Interrupt Generator - Built-in Temperature Sensor (± 3°C) High-Voltage Differential Amplifier - 60V Common Mode Input Range - Offset Adjust from –60V to +60V - 16 Gain Settings from 0.05 to 16 8-bit ADC

- Programmable Throughput up to 500ksps

- 8 External Inputs; Programmable as Single-Ended or Differential - Programmable Amplifier Gain: 4, 2, 1, 0.5 Two 12-bit DACs Three Comparators

Internal Voltage Reference

Precision VDD Monitor/Brown-out Detector

ON-CHIP JTAG DEBUG & BOUNDRY SCAN

- On-Chip Debug Circuitry Facilitates Full Speed, Non-Intrusive In-System Debug (No Emulator Required!)

- Provides Breakpoints, Single Stepping, Watchpoints, Stack Monitor, Program Trace Memory

- Inspect/Modify Memory and Registers

- Superior Performance to Emulation Systems Using ICE-Chips, Target Pods, and Sockets

-

IEEE1149.1 Compliant Boundary Scan

HIGH SPEED 8051 μC CORE

- Pipe-lined Instruction Architecture; Executes 70% of Instructions in 1 or 2 System Clocks

- Up to 25MIPS Throughput with 25MHz System Clock - Expanded Interrupt Handler

MEMORY

- 4352 Bytes Internal Data RAM (256 + 4k)

- 64k Bytes In-System Programmable FLASH Program Memory - External 64k Byte Data Memory Interface

CAN Bus 2.0B

- 32 Message Objects

- “Mailbox” implementation only interrupts CPU when needed

DIGITAL PERIPHERALS

- 64 Port I/O; All are 5V tolerant

- Hardware SMBus TM (I2C TM Compatible), SPI TM , and Two UART Serial Ports Available Concurrently

- Programmable 16-bit Counter Array with 6 Capture/Compare Modules - Five General Purpose 16-bit Counter/Timers

- Dedicated Watch-Dog Timer; Bi-directional Reset CLOCK SOURCES

- Internal Programmable 2% Oscillator: Up to 25MHz - External Oscillator: Crystal, RC, C, or Clock - Real-Time Clock Mode using Timer 3 or PCA SUPPLY VOLTAGE .........................2.7V to 3.6V - Typical Operating Current: 10mA @ 25MHz

-

Multiple Power Saving Sleep and Shutdown Modes

100-Pin TQFP; Temp Range –40°C to +85°C

8.6.2002

SELECTED ELECTRICAL SPECIFICATIONS T A = -40°C to +85°C, VDD = 2.7V unless otherwise specified.

PARAMETER CONDITIONS MIN TYP MAX UNITS GLOBAL CHARACTERISTICS Supply Voltage 2.7 3.6 V Supply Current (CPU active) Clock=25MHz Clock=1MHz Clock=32kHz; VDD Monitor Enabled 10 0.5 20 mA mA

μA

Supply Current (shutdown) Oscillator not running; VDD Monitor Disabled 0.1 μA Clock Frequency Range DC 25 MHz A/D CONVERTER

Resolution 12 bits Integral Nonlinearity ± 1 LSB Differential Nonlinearity Guaranteed Monotonic ± 1 LSB Signal-to-Noise Plus Distortion

66 69 dB Throughput Rate 100 ksps Input Voltage Range 0 VREF V D/A CONVERTERS

Resolution 12 LSB Differential Nonlinearity ± 1

LSB Output Settling Time 10 μs COMPARATORS Supply Current (each Comparator) 1.5 μA Response Time | CP+ – CP- | = 100mV 4 μs

SPI is a trademark of Motorola, Inc.; SMBus is a trademark of Intel Corp.; I2C is a trademark of Philips Semiconductors