HS6206
HS6206 2.4G Wireless SOC
V0.6
联盛科技有限公司
(汉天下一级代理)
赵先生:18666916148
钟先生:13480140932
HS6206 1Introduction
The HS6206 is a member of the low-cost, high-performance family of intelligent 2.4 GHz RF transceivers with embedded microcontrollers. The HS6206 is optimized to provide a single chip solution for Ultra Low Power (ULP) wireless applications. The combination of processing power, memory, low power oscillators, real-time counter and a range of power saving modes provides an ideal platform for implementation of RF protocols. Benefits of using HS6206 include tighter protocol timing, security, lower power consumption and improved co-existence performance. For the application layer the HS6206 offers a rich set of peripherals including: SPI (master and slave), UART, PWM, USB, and so on.
HS6206 2Product overview
2.1Features
Features of the HS6206 include:
●Fast 8-bit microcontroller:
Intel MCS 51 compliant instruction set
Reduced instruction cycle time, up to 12 times compared to legacy 8051
●Memory:
Program memory: 16 kB of OTP memory with security features
Internal RAM: 256Byte
User Data memory: 256 byte of on-chip RAM memory
● A number of on-chip hardware resources are available through programmable multi-purpose input/output pins:
18 GPIO
SPI master
SPI slave
Full duplex serial port
6PWMs
External interrupts
Timer inputs
●High performance 2.4 GHz RF transceiver
True single chip GFSK transceiver
Enhanced ShockBurst? link layer support in HW:
◆Packet assembly/disassembly
◆Address and CRC computation
◆Auto ACK and retransmit
On the air data rate 500 kbps, 1 Mbps or 2 Mbps
125 RF channels operation, with 79 (2.402 GHz –2.480 GHz) channels within 2.400–2.4835 GHz
Short switching time enable frequency hopping
●System reset and power supply monitoring:
On-chip power-on and brown-out reset
Watchdog timer reset
Reset from pin
Power-fail comparator with programmable threshold and interrupt to MCU
●On-chip timers:
Three16-bit timers/counters operating at the system clock (sources from the 16 MHz on-chip oscillators)
?Timer 0, Timer 1 are compatible to standard 8051
?Timer 2 supports timer mode and compare/capture mode
HS6206 One 24-bit timer/counter operating at the low frequency clock (32kHz)
●On-chip oscillators:
16 MHz crystal oscillator XOSC16M
16 MHz RC-oscillator RCOSC16M
32kHz RC-oscillator RCOSC32K
●Power management function:
Low power design supporting fully static stop/ standby
Programmable MCU clock frequency from 125 kHz to 16 MHz
On chip voltage regulators supporting low power mode
Watchdog and wakeup functionality running in low power mode
2.2Blocks
Figure2.1HS6206 block diagram
HS6206 3RF transceiver
The HS6206uses the same 2.4 GHz GFSK RF transceiver with embedded protocol engine. The RF transceiver is designed for operation in the world wide ISM frequency band at 2.400–2.4835 GHz and is very well suited for ultra-low power wireless applications.
The RF transceiver module is configured and operated through the RF transceiver map. This register map is accessed by the MCU through a dedicated on-chip Serial Peripheral interface (SPI) and is available in all power modes of the RF transceiver module. The embedded protocol engine enables data packet communication and supports various modes from manual operation to advanced autonomous protocol operation. Data FIFOs in the RF transceiver module ensure a smooth data flow between the RF transceiver module and the HS6206MCU.
The rest of this chapter is written in the context of the RF transceiver module as the core and the rest of the HS6206 as external circuitry to this module.
3.1Features
Features of the RF transceiver include:
●General
Worldwide 2.4 GHz ISM band operation
Common antenna interface in transmit and receive
GFSK modulation
500 kbps, 1 Mbps and 2 Mbps on air data rate
●Transmitter
Programmable output power: 8, 5, 0, -6, -12 , -30dBm(8dBm@3V)
18.5mA at 0dBm output power
●Receiver
Integrated channel filters
19.5mA at 2 Mbps
-85dBm sensitivity at 2 Mbps
-88dBm sensitivity at 1 Mbps
-90dBm sensitivity at 500 kbps
●RF Synthesizer
Fully integrated synthesizer
1 MHz frequency programming resolution
Accepts low cost ±60ppm 16 MHz crystal
1 MHz non-overlapping channel spacing at 1 Mbps
2 MHz non-overlapping channel spacing at 2 Mbps
●Protocol Engine
1 to 3
2 bytes dynamic payload length
HS6206 Automatic packet handling (assembly/disassembly)
Automatic packet transaction handling (auto ACK, auto retransmit)
● 6 data pipe MultiSlave for 6:1 star networks
3.2Block
Fig.3.1 RF transceiver block diagram
3.3Functional description
This section describes the different operating modes of the RF transceiver and the parameters used to control it.
The RF transceiver module has a built-in state machine that controls the transitions between the different operating modes. The state machine is controlled by SFR register RFCON and RF transceiver register CONFIG.
3.4Operational Modes
The HS6206 has a built-in state machine that controls the transitions between the chip’s operating modes. The state machine takes input from user defined register values and internal signals.
The state diagrams in Figure 3.2 shows the operating modes and how they function. There are three types of distinct states highlighted in the state diagram:
●Recommended operating mode: is a recommended state used during normal operation.
●Possible operating mode: is a possible operating state, but is not used during normal operation.
●Transition state: is a time limited state used during start up of the oscillator and settling of the PLL.