Issued Date: Dec. 2, 2009
Model No.: V370B1-L03
Approval TFT LCD Approval Specification MODEL NO.: V370B1-L03
TV Head Division
Approved By
Chao-Chun Chung
-
QA Dept. Product Development Div. Reviewed By
Hsin-Nan Chen WT Lin
LCD TV Marketing and Product Management Div. Prepared By
Josh Chi Chloe Chen
CONTENTS -
REVISION HISTORY ------------------------------------------------------- 3 1. GENERAL DESCRIPTION ------------------------------------------------------- 4 1.1 OVERVIEW
1.2 FEATURES
1.3 APPLICATION
1.4 GENERAL SPECIFICATIONS
1.5 MECHANICAL SPECIFICATIONS
2. ABSOLUTE MAXIMUM RATINGS ------------------------------------------------------- 5
2.1 ABSOLUTE RATINGS OF ENVIRONMENT
2.2PACKAGE STORAGE
2.3ELECTRICAL ABSOLUTE RATINGS
2.3.1 TFT LCD MODULE
2.3.2 BACKLIGHT UNIT
3. ELECTRICAL CHARACTERISTICS -------------------------------------------------------7
3.1 TFT LCD MODULE
3.2 BACKLIGHT UNIT
3.2.1 CCFL(Cold Cathode Fluorescent Lamp) CHARACTERISTICS
3.2.2 INVERTER CHARACTERISTICS
3.2.3 INVERTER INTERTFACE CHARACTERISTICS
4. BLOCK DIAGRAM -------------------------------------------------------14
4.1 TFT LCD MODULE
5. INTERFACE PIN CONNECTION ------------------------------------------------------- 15
5.1 TFT LCD MODULE
5.2 BACKLIGHT UNIT
5.3 INVERTER UNIT
5.4 BLOCK DIAGRAM OF INTERFACE
5.5 LVDS INTERFACE
5.6 COLOR DATA INPUT ASSIGNMENT
6. INTERFACE TIMING -------------------------------------------------------22
6.1 INPUT SIGNAL TIMING SPECIFICATIONS
6.2 POWER ON/OFF SEQUENCE
7. OPTICAL CHARACTERISTICS -------------------------------------------------------26
7.1 TEST CONDITIONS
7.2 OPTICAL SPECIFICATIONS
8. DEFINITION OF LABELS -------------------------------------------------------30
8.1 CMO MODULE LABEL
9. PACKAGING -------------------------------------------------------31 9.1 PACKING SPECIFICATIONS
9.2 PACKING METHOD
10. PRECAUTIONS -------------------------------------------------------33 10.1 ASSEMBLY AND HANDLING PRECAUTIONS
10.2 SAFETY PRECAUTIONS
11. MECHANICAL CHARACTERISTICS -------------------------------------------------------34
REVISION HISTORY
Version Date Page
(New) Section Description Ver 2.0 Dec. 2, 09’ All All Approval Specification was first issued.
1. GENERAL DESCRIPTION
1.1 OVERVIEW
V370B1-L03 s a 37” TFT Liquid Crystal Display module with 10S-type CCFL backlight unit and 1ch-LVDS interface. This module supports 1366 x 768 WXGA format and can display 16.7M (8-bit/color) colors. The inverter module for backlight is built-in.
1.2 FEATURES
- H igh brightness (450 nits)
- Ultra-high contrast ratio (3000:1)
- Fast response time (gray to gray average 6.5ms)
- High color saturation NTSC 72%
- Ultra wide viewing angle : 176(H)/176(V) (CR≥20) with Super MVA technology
- DE (Data Enable) only mode
- LVDS (Low Voltage Differential Signaling) interface
- Color reproduction (nature color)
1.3 APPLICATION
- TFT LCD TVs
- Multi-Media Display
1.4 GENERAL SPECIFICATI0NS
Item Specification Unit Note
Active Area 819.6 (H) x 460.8 (V) (37.02" diagonal) mm Bezel Opening Area 828.6 (H) x 469.8 (V) mm (1)
Driver Element a-si TFT active matrix -
Pixel Number 1366 x R.G.B. x 768 pixel
Pixel Pitch (Sub Pixel) 0.2(H) x 0.6 (V) mm
Pixel Arrangement RGB vertical stripe -
Display Colors 16.7M color
Display Operation Mode Transmissive mode / Normally black -
Surface Treatment Anti-Glare coating (Haze 11%),Hard coating (3H) -
1.5 MECHANICAL SPECIFICATIONS
Item Min. Typ. Max. Unit Note
Horizontal(H) 876 877 878 mm (1)
Vertical(V) 516 516.8 517.6 mm (1)
Depth(D) 35.4 36.4 37.4 mm To Rear
Depth(D) - - - mm To P-Cover Module Size
Depth(D) 52 53 54 mm To Inverter Cover Weight - 7770 - g
Note (1) Please refer to the attached drawings for more information of front and back outline dimensions.
2. ABSOLUTE MAXIMUM RATINGS
2.1 ABSOLUTE RATINGS OF ENVIRONMENT
Value
Item Symbol
Min. Max. Unit Note
Storage Temperature T ST-20 +60 oC (1) Operating Ambient Temperature T OP0 +50 oC
(1), (2) Shock (Non-Operating) S NOP- 50 G (3), (5) Vibration (Non-Operating) V NOP- 1.0 G (4), (5)
Note (1) Temperature and relative humidity range is shown in the figure below.
(a) 90 %RH Max. (Ta ?40 oC).
(b) Wet-bulb temperature should be 39 oC Max. (Ta > 40 oC).
(c) No condensation.
Note (2) The maximum operating temperature is based on the test condition that the surface temperature of display area is less than or equal to 65 oC with LCD module alone in a temperature controlled chamber.
Thermal management should be considered in final product design to prevent the surface temperature of display area from being over 65 oC. The range of operating temperature may degrade in case of improper thermal management in final product design.
Note (3) 11 ms, half sine wave, 1 time for ± X, ± Y, ± Z.
Note (4) 10 ~ 200 Hz, 10 min, 1 time each X, Y, Z.
Note (5) At testing Vibration and Shock, the fixture in holding the module has to be hard and rigid enough so that the module would not be twisted or bent by the fixture.
2.2 Package storage
When storing modules as spares for a long time, the following precaution is necessary.
(a) Do not leave the module in high temperature, and high humidity for a long time. It is highly recommended to
store the module with temperature from 0 to 35кat normal humidity without condensation.
(b)The module shall be stored in dark place. Do not store the TFT-LCD module in direct sunlight or fluorescent light.
2.3 ELECTRICAL ABSOLUTE RATINGS
2.3.1 TFT LCD MODULE
Value
Item Symbol
Min. Max. Unit Note
Power Supply Voltage Vcc -0.3 13.0 V
Input Signal Voltage V IN-0.3 3.6 V
(1)
2.3.2 BACKLIGHT UNIT
Item Symbol Test
Condition Min. Type Max. Unit Note Lamp Voltage V W Ta = 25 кЁЁ3000 V RMS
Power Supply Voltage V BLЁ0 Ё30 V(1)
Control Signal Level ЁЁ-0.3 Ё7 V(1), (3) Note (1) Permanent damage to the device may occur if maximum values are exceeded. Functional operation should be restricted to the conditions described under normal operating conditions. Note (2) No moisture condensation or freezing.
Note (3) The control signals include On/Off Control, Internal PWM Control, External PWM Control.
3. ELECTRICAL CHARACTERISTICS
3.1 TFT LCD MODULE Ta = 25 ± 2 oC
Value
Parameter
Symbol Min. Typ. Max. Unit Note Power Supply V oltage V CC 10.8
12
13.2 V (1) Rush Current
I RUSH
Ё
Ё
3
A (2) White Pattern
Ё Ё 0.50 Ё
A Horizontal Stripe Ё Ё 0.63 0.77
A Power Supply Current
Black Pattern
Ё
Ё
0.38
Ё A (3)
Differential Input High Threshold Voltage V LVTH +100
Ё Ё
mV Differential Input Low Threshold Voltage V LVTL Ё
Ё
-100 mV Common Input V oltage V CM 1.0 1.2
1.4 V Differential input voltage |V ID | 200
Ё
600
mV LVDS interface
Terminating Resistor
R T Ё
100
Ё
ohm (4)
Input High Threshold V oltage V IH 2.7 Ё 3.3 V CMOS interface
Input Low Threshold V oltage
V IL
Ё
0.7
V
Note (1) The module should be always operated within above ranges. Note (2) Measurement Conditions:
SW Vcc
+12.0
Note (3) The specified power supply current is under the conditions at Vcc =12V, Ta = 25 ± 2 oC, f v = 60 Hz,
whereas a power dissipation check pattern below is displayed.
c. Horizontal Stripe
Active Area
Vcc rising time is 470us
Active Area
a. White Pattern
b. Black Pattern
Note (4) The LVDS input characteristics are as follows:
3.2 BACKLIGHT UNIT
3.2.1 CCFL (Cold Cathode Fluorescent Lamp) CHARACTERISTICS (Ta = 25 ± 2 oC)
Value
Unit Note Parameter Symbol
Min. Typ. Max.
Lamp Voltage V W- 990 - V RMS
Lamp Current I L8.1 8.6 9.1 mA RMS(1)
- - 1730 V RMS Ta = 0 oC (2) Lamp Starting Voltage V S- - 1340 V
RMS Ta = 25 oC (2) Operating Frequency F O30 - 80 KHz (3) Lamp Life Time L BL50,000 - Hrs (4)
3.2.2 INVERTER CHARACTERISTICS (Ta = 25 ± 2 oC)
Value
Unit Note Parameter Symbol
Min. Typ. Max.
Power Consumption P BLЁ86.4 92 W (5) (6) I L = 8.6mA Power Supply Voltage V BL22.8 2425.2V DC
Power Supply Current I BLЁ 3.6 3.83 A Non Dimming Input Ripple Noise Ё- ЁЁ912 mV P-P V BL =22.8V Oscillating Frequency F W37.0 40.0 43.0 kHz (3)
Dimming Frequency F B150 160 170 Hz
Minimum Duty Ratio D MIN20 Ё%
Input Inrush Current Irush 5.9 A
Note (1) Lamp current is measured by utilizing AC current probe.
Note (2) The lamp starting voltage V S should be applied to the lamp for more than 1 second after startup.
Otherwise the lamp may not be turned on.
Note (3) The lamp frequency may produce interference with horizontal synchronous frequency of the display input signals, and it may result in line flow on the display. In order to avoid interference, the
lamp frequency should be detached from the horizontal synchronous frequency and its harmonics
as far as possible.
Note (4) The life time of a lamp is defined as when the brightness is larger than 50% of its original value and the effective discharge length is longer than 80% of its original length (Effective discharge
length is defined as an area that has equal to or more than 70% brightness compared to the
brightness at the center point of lamp.) as the time in which it continues to operate under the
condition at Ta = 25 ?2кand I L = 8.1~9.1 mArms.
Note (5) The power supply capacity should be higher than the total inverter power consumption P BL. Since the pulse width modulation (PWM) mode was applied for backlight dimming, the driving current
changed as PWM duty on and off. The transient response of power supply should be considered
for the changing loading when inverter dimming.
Note (6) The measurement condition of Max. value is based on 42" backlight unit under input voltage 24V, average lamp current 8.9 mA and lighting 30 minutes later.
3.2.3 INVERTER INTERTFACE CHARACTERISTICS
Value
Parameter
Symbol
Test
Condition Min. Typ.
Max. Unit Note
ON Ё 2.0 Ё 5.0 V On/Off Control Voltage OFF
V BLON Ё 0 Ё 0.8 V
MAX 3.15 3.3 3.45 V Maximum duty ratio Internal PWM Control Voltage MIN V IPWM Ё Ё 0 Ё V Minimum duty ratio HI 2.0 Ё 5.0 V Duty on External PWM Control Voltage LO
V EPWM Ё 0 Ё 0.8 V Duty off HI
3.0 3.3 3.6 V Normal Status Signal
LO
Status Ё 0 Ё 0.8 V Abnormal VBL Rising Time Tr1 Ё 30 Ё Ё ms VBL Falling Time
Tf1 Ё 30 Ё Ё ms 10%-90%V BL Control Signal Rising Time Tr Ё Ё Ё 100 ms Control Signal Falling Time Tf Ё Ё Ё 100 ms PWM Signal Rising Time T PWMR Ё Ё Ё 50 us PWM Signal Falling Time T PWMF Ё Ё Ё 50 us
Input impedance R IN Ё 1 Ё
Ё M ?
PWM Delay Time T PWM Ё 100 Ё ms T on
Ё 300 Ё Ё ms BLON Delay Time T on1
Ё 300 Ё Ё ms BLON Off Time
T off
Ё
300
Ё Ё
ms
Note (1) The Dimming signal should be valid before backlight turns on by BLON signal. It is inhibited to
change the internal/external PWM signal during backlight turn on period.
Note (2) The power sequence and control signal timing are shown in the following figure. For a certain
reason, the inverter has a possibility to be damaged with wrong power sequence and control signal timing.
Note (3) While system is turned ON or OFF, the power sequences must follow as below descriptions: Turn ON sequence: VBL Ш PWM signal Ш BLON
Turn OFF sequence: BLOFF
ψ PWM signal
ψ
VBL
100%
Minimun Duty
4. BLOCK DIAGRAM 4.1 TFT LCD MODULE
5. INTERFACE PIN CONNECTION
5.1 TFT LCD MODULE
CNF1 Connector Pin Assignment
Pin No. Symbol Description Note
1 VCC Power supply: +12V
2 VCC Power supply: +12V
3 VCC Power supply: +12V
4 VCC Power supply: +12V
5 GND Ground
6 GND Ground
7 GND Ground
8 NC No connection (4)
9 SELLVDS Select LVDS data format (2),(5)
10 ODSEL Overdrive Lookup Table Selection (3),(5)
11 GND Ground
12 RX0- Negative transmission data of pixel 0
13 RX0+ Positive transmission data of pixel 0
14 GND Ground
15 RX1- Negative transmission data of pixel 1
16 RX1+ Positive transmission data of pixel 1
17 GND Ground
18 RX2- Negative transmission data of pixel 2
19 RX2+ Positive transmission data of pixel 2
20 GND Ground
21 RXCLK- Negative of clock
22 RXCLK+ Positive of clock
23 GND Ground
24 RX3- Negative transmission data of pixel 3
25 RX3+ Positive transmission data of pixel 3
26 GND Ground
27 NC No connection (4)
28 NC No connection (4)
29 NC No connection (4)
30 GND Ground
Note (1) Connector type: STARCONN 093G30-B0001A or Faxconn GS23302-1311S-7F or compatible LVDS connector pin orderdefined as follows
Note (2) Low = Open or connect to GND: VESA Format, High = Connect to +3.3V: JEIDA Format.
Please refer to 5.5 LVDS INTERFACE
Note (3) Overdrive lookup table selection. The Overdrive lookup table should be selected in accordance to the frame rate to optimize image quality.
Note (4) Reserved for internal use. Left it open.
Note (5) LVDS signal pin connected to the LCM side has the following diagram.
R1 in the system side should be less than 1K Ohm. (R1 < 1K Ohm)
5.2 BACKLIGHT UNIT
The pin configuration for the housing and leader wire is shown in the table below.
Pin No. Symbol Description Remark
NA NA NA NA Note (1) The backlight interface housing for high voltage side is a model CPLEA4C1000, manufactured by CVILUX or equivalent.
5.3 INVERTER UNIT
CN1 (Header): CI0114M1HR0-LA (CviLux)
Pin No. Symbol Description 1
2 3 4 5 VBL +24V Power input
6
7
8
9
10
GND Ground
11 Status Normal (3.3V)
Abnormal (0V)
12 E_PWM External PWM Control
13 I_PWM Internal PWM Control
14 BLON BL ON/OFF
Notice:
PIN 13:Intermal PWM Control (Use Pin 13): Pin 12 must open. PIN 12:External PWM Control (Use Pin 12): Pin 13 must open. Pin 13(I_PWM) and Pin 12(E_PWM) can’t open in same period.
5.4 BLOCK DIAGRAM OF INTERFACE
R0~R7 : Pixel R Data , G0~G7 : Pixel G Data , B0~B7 : Pixel B Data , DE : Data enable signal
Note (1) The system must have the transmitter to drive the module.
Note (2) LVDS cable impedance shall be 50 ohms per signal line or about 100 ohms per twist-pair line when it is used differentially.
R0-R7 G0-G7 B0-B7 DE
Host Graphics Controller
TxIN
PLL
PLL
R0-R7
G0-G7 B0-B7 DE
DCLK Timing Controller
LVDS Transmitter THC63LVDM83A
(LVDF83A)
LVDS Receiver THC63LVDF84A
Rx0+ Rx0- Rx1+ Rx1- Rx2+ Rx2- CLK+ CLK-
RxOUT
51?
51?
51?
51? 51?
51? 51?
51? 51?
51?
100pF
100pF
100pF
100pF
100pF
Rx3- Rx3+
5.5 LVDS INTERFACE
VESA LVDS forma?Κ???????
JEDIA LVDS forma?Κ???
R0~R7: Pixel R Data (7; MSB, 0; LSB)
G0~G7: Pixel G Data (7; MSB, 0; LSB)
B0~B7: Pixel B Data (7; MSB, 0; LSB)
DE: Data enable signal
Notes(1) RSVD(reserved)pins on the transmitter shall be “H” or( “L” or OPEN)