MEMORY存储芯片TMS27C256-2JL中文规格书

TPC10 SERIES CMOS FIELD-PROGRAMMABLE GATE ARRAYS

SRFS001 F -D3864, DECEMBER 1989 -REVISED FEBRUARY 1993

package thermal characteristics

The device junction to case thermal characteristic is R eJ C, and the junction to ambient air characteristic is R eJA· The thermal characteristics fo「ReJ A are shown with two different air-flow rates. Maximum junction temperature is 150。C for short durations. However, a maximum junction temperature of 140。C is recommended to「continuing ope「ation.A sample calculation of the maximum power dissipation for a PLCC 84-pin package at commercial temperature is as follows:

M缸.junction temp. （。C )-Max. commercial temp. （。C )150。C-70。C = =2W PACKAGE TYPE

Ceramic Pin Grid Arra y (CPGA)

Ceramic Quad Flat Package (CQFP)

Plastic Leaded Chip Carrier PLCC

Plastic Quad Flat Package (PQFP) ReJ A （。C /W)

40。C!W R队』C R0JA PIN COUNT STILL AI R 84 3.5 48 84 3.5 75 44 13 65 68 13 50 84 10 40 100 10 60 Device Juncti 。

n R队I A 300FT/MIN NA NA 41 32 27 38

Air Fl 。

w

‘－－－－－－－ UNIT 。CN-1。CN-1。CN-1。CN-1

TPC10 SERIES CMOS FIELD-PROGRAMMABLE GATE ARRAYS

SRFS001 F -D3864, DECEMBER 1989 -REVISED FEBRUARY 1993

ordering info『mation

Configurations of the TPC 10 Series devices can be ordered using the pa同numbers in the examples below. Commercial and industrial versions can be ordered as follows:

EXAMPL E

－”

PREFIX DEVICE TYPE …叮」101 O = 1200 Equivalent Gate Array 1 020 = 2000 Equivalent Gate Array

DEVICE REVISION A = Tl 1.2-μm CMOS Technology

B = Tl 1.0-μm CMOS Technology A FN-068

C 1 T l二－……1onal)l 』－TEMPERATURE RANGE I C = 0。C t 。70。c I I = -40。C to 85。C 」－DEVICE PINS 044 = 44 pins 068 = 68 pins 084 = 84 pins 100 = 100 pins

PACKAGE TYPE FN = Plastic leaded chip carrier VE = Plastic quad flat package

Military versions can be ordered as follows:

EXAMPLE -

PREFIX

DEVICE TYPE 1010 = 1200 Equivalent Gates 1020 = 2000 Equivalent Gates …η」

M GB 84 B -1 DEVICE REVISION A= Tl 1.2-μm CMOS Technology

GB= Ceramic pin grid array HT = Ceramic quad flat package HFG = Ceramic quad flat package with nonc 。nductive tie bar

TEMPERATURE RANGE M = -55。C to 125。C

DEFENSE ELECTRONIC SYSTEM CENTER (DESC) NUMBER AVAILABLE DESC DEVICE NAME PR 。

CESSING

NUMBER TPC1010AM

TPC1020AM Class B Class B Space Equivalent 5962-9096401 M 5962-9096501 M macro library

The TPC10 Series is supported by a macro lib『ary of more than 250 hardwired and soft macro functions. The macros range from primitive logic gates to MSl-level complex functions such as counters, decoders, and comparators. The hardwired macro characteristics are p「ovided in the electrical and switching characteristics. The software macros have characteristics simila「to the components of the macro but need the place and route data back annotated into the design to establish actual performance.

The FPGA logic 『nod1』le implements logic functions with inverted inputs as efficiently as noninverted inputs, without an increase in propagation delay. By taking advantage of the various combinations of input polarity, the use of separate inverters can be virtually eliminated.