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HD74LS373P datasheet

HD74LS373P datasheet
HD74LS373P datasheet

HD74LS373

Octal D-type Transparent Latches (with three-state outputs)

REJ03D0482–0200

Rev.2.00

Feb.18.2005 The HD74LS373, 8-bit register features totem-pole three-state outputs designed specifically for driving highly-capacitive or relatively low-impedance loads. The high-impedance third state and increased high-logic-level drive provide this register with the capacity of being connected directly to and driving the bus lines in a bus-organized system without need for interface or pull-up components. They are particularly attractive for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

The eight latches are transparent D-type latches meaning that while the enable (G) is high the Q outputs will follow the data (D) inputs. When the enable is taken low the output will be latched at the level of the data that was setup. Features

? Ordering Information

Part Name Package Type Package Code

(Previous Code)

Package

Abbreviation

Taping Abbreviation

(Quantity)

HD74LS373P DILP-20

pin PRDP0020AC-B

(DP-20NEV)

P —

HD74LS373FPEL SOP-20 pin (JEITA) PRSP0020DD-B

(FP-20DAV)

FP EL (2,000 pcs/reel)

HD74LS373RPEL SOP-20 pin (JEDEC) PRSP0020DC-A

(FP-20DBV)

RP EL (1,000 pcs/reel)

Note: Please consult the sales office for the above package availability. Pin Arrangement

Function Table

Inputs Output

Output control Enable G D Q

L H H H L H L L L L X Q 0

H X X Z Notes: H; high level, L; low level, X; irrelevant

Q 0; level of Q before the indicated steady-state input conditions were established Z; off (high-impedance) state of a three-state output

Block Diagram

Absolute Maximum Ratings

Item Symbol Ratings Unit

Supply voltage V CC 7 V

Input voltage V IN 7 V Power dissipation P T 400 mW

Storage temperature

Tstg

–65 to +150

°C

Note: Voltage value, unless otherwise noted, are with respect to network ground terminal.

Recommended Operating Conditions

Item Symbol Min Typ Max Unit

Supply voltage V CC 4.75 5.00 5.25 V Output voltage V OH — — 5.5 V I OH — — –2.6 mA Output current

I OL — — 24 mA

Operating temperature Topr –20 25 75 °C “H” Level 15

ns

Enable pulse width “L” Level

t w 15 — — ns Data setup time t su

5↓ — — ns

Data hold time t h 20↓ — — ns

Electrical Characteristics

(Ta = –20 to +75 °C)

Item Symbol min. typ.* max. Unit Condition

V IH 2.0 — — V

— — 0.7 Data inputs

Input voltage V IL

— — 0.8 V G, Output control inputs

V OH 2.4 — — V

V CC = 4.75 V, V IH = 2 V, V IL = V IL max

I OH = –2.6 mA

— — 0.4 I OL = 12 mA Output voltage

V OL — — 0.5 V

I OL = 24 mA

V CC = 4.75 V,

V IH = 2 V, V IL = V IL max I OZH — — 20 V O = 2.7 V Output current

I OZL — — –20 μA

V O = 0.4 V

V CC = 5.25 V,

V IH = 2 V I IH — — 20 μA V CC = 5.25 V, V I = 2.7 V I IL — — –0.4 mA V CC = 5.25 V, V I = 0.4 V

Input current

I I —

— 0.1 mA V CC = 5.25 V, V I = 7 V Short-circuit output current I OS –30 — –130 mA V CC = 5.25 V Supply current

I CC — 24 40 mA

V CC = 5.25 V, V I = 4.5 V (Output control)

Input clamp voltage

V IK — — –1.5 V V CC = 4.75 V, I IN = –18 mA

Note: * V CC = 5 V, Ta = 25°C

Switching Characteristics

(V CC = 5 V, Ta = 25°C)

Item Symbol Input Output min. typ. max. Unit Condition

t PLH — 12 18

t PHL D Q

— 12 18

t PLH — 20 30 Propagation delay time

t PHL G Q

— 18 30

t ZH — 15 28

Output enable time t ZL OC Q

— 25 36 C L = 45 pF,

R L = 667 ? t HZ — 12 20 Output disable time

t LZ OC Q — 15 25 ns

C L = 5 pF,

R L = 667 ?

Testing Method Test Circuit

Waveforms 1

Waveforms 2

Waveforms 3

Package Dimensions

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