HD74LS74A
Dual D-type Positive Edge-triggered Flip-Flops
(with Preset and Clear)
REJ03D0415–0300
Rev.3.00
Jul.22.2005 Features
? Ordering Information
Part Name Package Type Package Code
(Previous Code)
Package
Abbreviation
Taping Abbreviation
(Quantity)
HD74LS74AP DILP-14
pin PRDP0014AB-B
(DP-14AV)
P —
HD74LS74AFPEL SOP-14 pin (JEITA) PRSP0014DF-B
(FP-14DAV)
FP EL (2,000 pcs/reel)
HD74LS74ARPEL SOP-14 pin (JEDEC) PRSP0014DE-A
(FP-14DNV)
RP EL (2,500 pcs/reel)
Note: Please consult the sales office for the above package availability. Pin Arrangement
Function Table
Input Output Preset Clear Clock D Q Q
L H X X H L
H L X X L H
L L X X H* H*
H H ↑ H H L
H H ↑ L L H
H H L X Q0Q0
H; high level, L; low level, X; irrelevant, ↑; transition from low to high level,
Q0; level of Q before the indicated steady-state input conditions were established.
Q0; complement of Q0 or level of Q before the indicated steady-state input conditions were established.
*;This configuration is nonstable, that is, it will not persist when preset and clear inputs return to their inactive (high) level.
Absolute Maximum Ratings
Unit
Ratings
Item Symbol
Supply voltage V CC 7 V
Input voltage V IN 7 V
Power dissipation P T 400 mW
Storage temperature Tstg –65 to +150 °C
Note: Voltage value, unless otherwise noted, are with respect to network ground terminal.
Recommended Operating Conditions
Unit
Typ
Max
Item Symbol
Min
Supply voltage V CC 4.75 5.00 5.25 V
I OH — — –400 μA
Output current
I OL — — 8 mA
Operating temperature Topr –20 25 75 °C
Clock frequency f clock 0 — 25 MHz
Clock High t w 25 — —
ns
Pulse width
Clear Preset t w 25 — —
“H” Data t su 20↑ — —
Setup time
ns
“L” Data t su 20↑ — —
Hold time t h5↑ — — ns
Note: ↑; The arrow indicates the rising edge.
Electrical Characteristics
(Ta = –20 to +75 °C)
Item Symbol min. typ.* max. Unit Condition
V IH 2.0 — — V
Input voltage
V IL —
— 0.8 V V OH 2.7 — — V
V CC = 4.75 V, V IH = 2 V, V IL = 0.8 V,
I OH = –400 μA
— — 0.5 I OL = 8 mA Output voltage
V OL
— — 0.4 V I OL = 4 mA V CC = 4.75 V, V IL = 0.8 V,
V IH = 2 V
D — — 20
Clear — — 40
Preset — —
40 Clock I IH — — 20
μA V CC = 5.25 V, V I = 2.7 V
D — — –0.4 Clear — — –0.8
Preset — — –0.8 Clock I IL — — –0.4 mA V CC = 5.25 V, V I = 0.4 V
D — — 0.1 Clear — — 0.2
Preset — — 0.2 Input
current
Clock I I — — 0.1
mA V CC = 5.25 V, V I = 7 V
Short-circuit output
current
I OS –20 — –100 mA V CC = 5.25 V Supply current
I CC ** — 4 8 mA V CC = 5.25 V
Input clamp voltage V IR — — –1.5 V V CC = 4.75 V, I IN = –18 mA
Notes: * V CC = 5 V, Ta = 25°C ** With all output open, I CC is measured with the Q and Q outputs high in turn. At the time of measurement, the
clock input is grounded.
Switching Characteristics
(V CC = 5 V, Ta = 25°C)
Item Symbol Inputs Outputs min. typ. max. Unit Condition
Maximum clock frequency f max 25 33 MHz
t PLH — 13 25 ns Propagation delay time
t PHL Clear, Clock or Preset Q, Q
— 25 40 ns C L = 15 pF,
R L = 2 k ?
Timing Definition
Testing Method
Test Circuit
1. ?max, t PLH, t PHL (Clock→Q, Q)
2. t PHL, t PLH (Clear or Preset→ Q, Q)
Waveforms 1
Waveforms 2
Package Dimensions
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