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SN74LV244ATRGYR中文资料

SN74LV244ATRGYR中文资料
SN74LV244ATRGYR中文资料

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FEATURES

DB, DGV, DW, NS, OR PW PACKAGE

(TOP VIEW)

RGY PACKAGE (TOP VIEW)

1

20

10

11

23456789

19181716151413122OE 1Y12A41Y22A31Y32A21Y41A12Y41A22Y31A32Y21A42Y1

1O E

2A 1

V G N D

C C

CC 2OE DESCRIPTION/ORDERING INFORMATION

SN74LV244AT

OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS

SCES572C–JUNE 2004–REVISED AUGUST 2005

?Inputs Are TTL-Voltage Compatible ?I off Supports Partial-Power-Down Mode Operation

? 4.5-V to 5.5-V V CC Operation ?Latch-Up Performance Exceeds 250mA Per ?Typical t pd =5.4ns at 5V

JESD 17

?Typical V OLP (Output Ground Bounce)?

ESD Protection Exceeds JESD 22

<0.8V at V CC =5V,T A =25°C

–2000-V Human-Body Model (A114-A)?Typical V OHV (Output V OH Undershoot)>2.3V at V CC =5V,T A =25°C

–200-V Machine Model (A115-A)

?

Supports Mixed-Mode Voltage Operation on –1000-V Charged-Device Model (C101)

All Ports

This octal buffer/driver is designed specifically to improve both the performance and density of 3-state memory-address drivers,clock drivers,and bus-oriented receivers and transmitters.

The SN74LV244AT is organized as two 4-bit buffers/line drivers with separate output-enable (OE)inputs.When OE is low,the device passes data from the A inputs to the Y outputs.When OE is high,the outputs are in the high-impedance state.

ORDERING INFORMATION

T A

PACKAGE (1)

ORDERABLE PART NUMBER TOP-SIDE MARKING QFN –RGY Reel of 1000SN74LV244ATRGYR VV244Tube of 25SN74LV244ATDW SOIC –DW LV244AT Reel of 2000SN74LV244ATDWR SOP –NS

Reel of 2000SN74LV244ATNSR 74LV244AT –40°C to 85°C

SSOP –DB Reel of 2000SN74LV244ATDBR LV244AT

Tube of 70SN74LV244ATPW TSSOP –PW Reel of 2000SN74LV244ATPWR LV244AT

Reel of 250SN74LV244ATPWT TVSOP –DGV

Reel of 2000

SN74LV244ATDGVR

LV244AT (1)

Package drawings,standard packing quantities,thermal data,symbolization,and PCB design guidelines are available at https://www.sodocs.net/doc/c46571541.html,/sc/package.

Please be aware that an important notice concerning availability,standard warranty,and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

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DESCRIPTION/ORDERING INFORMATION (CONTINUED)

1Y11OE

1A1

1Y21A2

1Y31A3

1Y4

1A4

2Y1

2OE

2A1

2Y2

2A2

2Y3

2A3

2Y4

2A4

SN74LV244AT

OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS

SCES572C–JUNE 2004–REVISED AUGUST 2005

To ensure the high-impedance state during power up or power down,OE shall be tied to V CC through a pullup resistor;the minimum value of the resistor is determined by the current-sinking capability of the driver.

This device is fully specified for partial-power-down applications using I off .The I off circuitry disables the outputs,preventing damaging current backflow through the device when it is powered down.

FUNCTION TABLE

(EACH 4-BIT BUFFER/DRIVER)

INPUTS

OUTPUT

Y

OE A L H H L L L H

X

Z

LOGIC DIAGRAM (POSITIVE LOGIC)

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Absolute Maximum Ratings(1) Recommended Operating Conditions(1)

SN74LV244AT OCTAL BUFFER/DRIVER

WITH3-STATE OUTPUTS SCES572C–JUNE2004–REVISED AUGUST2005

over operating free-air temperature range(unless otherwise noted)

MIN MAX UNIT V CC Supply voltage range–0.57V

V I Input voltage range(2)–0.57V

V O Voltage range applied to any output in the high-impedance or power-off state(2)–0.57V

V O Output voltage range applied in the high or low state(2)(3)–0.5V CC+0.5V

I IK Input clamp current V I<0–20mA I OK Output clamp current V O<0–50mA I O Continuous output current V O=0to V CC±35mA

Continuous current through V CC or GND±70mA

DB package(4)70

DGV package(4)92

DW package(4)58

θJA Package thermal impedance°C/W

NS package(4)60

PW package(4)83

RGY package(5)37

T stg Storage temperature range–65150°C (1)Stresses beyond those listed under"absolute maximum ratings"may cause permanent damage to the device.These are stress ratings

only,and functional operation of the device at these or any other conditions beyond those indicated under"recommended operating conditions"is not implied.Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2)The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.

(3)This value is limited to5.5V maximum.

(4)The package thermal impedance is calculated in accordance with JESD51-7

(5)The package thermal impedance is calculated in accordance with JESD51-5.

MIN MAX UNIT V CC Supply voltage 4.5 5.5V

V IH High-level input voltage V CC=4.5V to5.5V2V

V IL Low-level input voltage V CC=4.5V to5.5V0.8V

V I Input voltage0 5.5V

High or low state0V CC

V O Output voltage V

3-state0 5.5

I OH High-level output current V CC=4.5V to5.5V–16mA I OL Low-level output current V CC=4.5V to5.5V16mA ?t/?v Input transition rise or fall rate V CC=4.5V to5.5V20ns/V T A Operating free-air temperature–4085°C (1)All unused inputs of the device must be held at V CC or GND to ensure proper device operation.Refer to the TI application report,

Implications of Slow or Floating CMOS Inputs,literature number SCBA004.

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Electrical Characteristics

Switching Characteristics

Noise Characteristics (1)

SN74LV244AT

OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS

SCES572C–JUNE 2004–REVISED AUGUST 2005

over recommended operating free-air temperature range (unless otherwise noted)

T A =–40°C T A =25°C to 85°C PARAMETER

TEST CONDITIONS

V CC UNIT

MIN

TYP MAX

MIN MAX

I OH =–50μA 4.5V 4.4 4.5

4.4V OH V I OH =–16mA 4.5V 3.8

3.8

I OL =50μA 4.5V 0

0.10.1V OL V I OL =16mA 4.5V 0.550.55I I V I =5.5V or GND 0to 5.5V ±0.1±1μA I OZ V O =V CC or GND 5.5V ±0.25

±2.5μA I CC V I =V CC or GND,I O =0

5.5V 220μA ?I CC (1)One input at 3.4V,Other inputs at V CC or GND

5.5V 1.35 1.5mA I off V I or V O =0to 5.5V 0

0.5

5μA C i

V I =V CC or GND

4.5pF (1)

This is the increase in supply current for each input at one of the specified TTL voltage levels,rather than 0V or V CC .

over recommended operating free-air temperature range,V CC =5V ±0.5V (unless otherwise noted)(see Figure 1)

T A =25°C FROM TO LOAD

PARAMETER

MIN MAX UNIT (INPUT)(OUTPUT)CAPACITANCE MIN TYP MAX t PLH 2.65/47.418.5A or B B or A C L =15pF ns t PHL 2.4 5.47.418.5t PZH 2.27.710.4112OE A or B C L =15pF ns t PZL 2.77.710.4112t PHZ 2.2 3.97.718OE A or B C L =15pF ns t PLZ 2.5 3.97.718t PLH 4 5.98.919.5A or B B or A C L =50pF ns t PHL 4.7 5.98.919.5t PZH 3.98.211.4113OE A or B C L =50pF ns t PZL 4.98.211.4113t PHZ 3.38.811.4113OE

A or B

C L =50pF ns t PLZ 3.2

8.8

11.41

13t sk(o)

C L =50pF

1

1

ns

V CC =5V,C L =50pF

T A =25°C PARAMETER

UNIT MIN

TYP MAX

V OL(P)Quiet output,maximum dynamic V OL 0.81V V OL(V)Quiet output,minimum dynamic V OL –0.8–1

V V OH(V)Quiet output,minimum dynamic V OH 4

V V IH(D)High-level dynamic input voltage 2

V V IL(D)Low-level dynamic input voltage

0.8

V

(1)

Characteristics are for surface-mount packages only.

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Operating Characteristics

SN74LV244AT OCTAL BUFFER/DRIVER

WITH3-STATE OUTPUTS SCES572C–JUNE2004–REVISED AUGUST2005

V CC =5V,T

A

=25°C

PARAMETER TEST CONDITIONS TYP UNIT

C pd Power dissipation capacitance Outputs enabled C L=50pF,f=10MHz8pF

https://www.sodocs.net/doc/c46571541.html, PARAMETER MEASUREMENT INFORMATION

3 V

3 V

0 V

0 V

VOLTAGE WAVEFORMS

SETUP AND HOLD TIMES

Data Input

Input

Out-of-Phase

Output

In-Phase

Output

Timing Input

VOLTAGE WAVEFORMS

PROPAGATION DELAY TIMES

INVERTING AND NONINVERTING OUTPUTS

Output

Control

Output

Waveform 1

S1 at V CC

(see Note B)

Output

Waveform 2

S1 at GND

(see Note B)

V OL

V OH

≈V CC

0 V

≈0 V

3 V

VOLTAGE WAVEFORMS

ENABLE AND DISABLE TIMES

LOW- AND HIGH-LEVEL ENABLING

t PLH/t PHL

t PLZ/t PZL

t PHZ/t PZH

Open Drain

Open

V CC

GND

V CC

TEST S1

3 V

0 V

VOLTAGE WAVEFORMS

PULSE DURATION

Input

From Output

Under Test

LOAD CIRCUIT FOR

3-STATE AND OPEN-DRAIN OUTPUTS

From Output

Under Test

LOAD CIRCUIT FOR

TOTEM-POLE OUTPUTS

Open

NOTES: A.C L includes probe and jig capacitance.

B.Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.

Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.

C.All input pulses are supplied by generators having the following characteristics:PRR ≤ 1 MHz, Z O = 50 ?, t r≤ 3 ns, t f≤ 3 ns.

D.The outputs are measured one at a time, with one input transition per measurement.

E.t PLZ and t PHZ are the same as t dis.

F.t PZL and t PZH are the same as t en.

G.t PHL and t PLH are the same as t pd.

H.All parameters and waveforms are not applicable to all devices.

SN74LV244AT

OCTAL BUFFER/DRIVER

WITH3-STATE OUTPUTS

SCES572C–JUNE2004–REVISED AUGUST2005

Figure1.Load Circuits and Voltage Waveforms

PACKAGING INFORMATION

Orderable Device Status (1)Package Type Package Drawing Pins Package Qty Eco Plan (2)

Lead/Ball Finish MSL Peak Temp (3)SN74LV244ATDBR ACTIVE SSOP DB 202000Green (RoHS &

no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LV244ATDBRE4ACTIVE SSOP DB 202000Green (RoHS &

no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LV244ATDGVR ACTIVE TVSOP DGV 202000Green (RoHS &

no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LV244ATDGVRE4ACTIVE TVSOP DGV 202000Green (RoHS &

no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LV244ATDW ACTIVE SOIC DW 2025Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LV244ATDWE4ACTIVE SOIC DW 2025

Green (RoHS &no Sb/Br)

CU NIPDAU Level-1-260C-UNLIM SN74LV244ATDWR ACTIVE SOIC DW 202000Green (RoHS &

no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LV244ATDWRE4ACTIVE SOIC DW 202000Green (RoHS &

no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LV244ATNSR ACTIVE SO NS 20

2000Green (RoHS &

no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LV244ATNSRE4ACTIVE SO NS 202000Green (RoHS &

no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LV244ATPW ACTIVE TSSOP PW 2070Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LV244ATPWE4ACTIVE TSSOP PW 2070

Green (RoHS &no Sb/Br)

CU NIPDAU Level-1-260C-UNLIM SN74LV244ATPWR ACTIVE TSSOP PW 202000Green (RoHS &

no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LV244ATPWRE4ACTIVE TSSOP PW 202000Green (RoHS &

no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LV244ATPWT ACTIVE TSSOP PW 20250Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LV244ATPWTE4ACTIVE TSSOP PW 20250

Green (RoHS &no Sb/Br)

CU NIPDAU Level-1-260C-UNLIM SN74LV244ATRGYR ACTIVE QFN RGY 201000Green (RoHS &

no Sb/Br)

CU NIPDAU Level-2-260C-1YEAR SN74LV244ATRGYRG4

ACTIVE

QFN

RGY

20

TBD

Call TI

Call TI

(1)

The marketing status values are defined as follows:ACTIVE:Product device recommended for new designs.

LIFEBUY:TI has announced that the device will be discontinued,and a lifetime-buy period is in effect.

NRND:Not recommended for new designs.Device is in production to support existing customers,but TI does not recommend using this part in a new design.

PREVIEW:Device has been announced but is not in production.Samples may or may not be available.OBSOLETE:TI has discontinued the production of the device.

(2)

Eco Plan -The planned eco-friendly classification:Pb-Free (RoHS),Pb-Free (RoHS Exempt),or Green (RoHS &no Sb/Br)-please check https://www.sodocs.net/doc/c46571541.html,/productcontent for the latest availability information and additional product content details.TBD:The Pb-Free/Green conversion plan has not been defined.

Pb-Free (RoHS):TI's terms "Lead-Free"or "Pb-Free"mean semiconductor products that are compatible with the current RoHS requirements for all 6substances,including the requirement that lead not exceed 0.1%by weight in homogeneous materials.Where designed to be soldered at high temperatures,TI Pb-Free products are suitable for use in specified lead-free processes.

Pb-Free (RoHS Exempt):This component has a RoHS exemption for either 1)lead-based flip-chip solder bumps used between the die and package,or 2)lead-based die adhesive used between the die and leadframe.The component is otherwise considered Pb-Free (RoHS

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18-Jul-2006

compatible)as defined above.

Green (RoHS &no Sb/Br):TI defines "Green"to mean Pb-Free (RoHS compatible),and free of Bromine (Br)and Antimony (Sb)based flame retardants (Br or Sb do not exceed 0.1%by weight in homogeneous material)

(3)

MSL,Peak Temp.--The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications,and peak solder temperature.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided.TI bases its knowledge and belief on information provided by third parties,and makes no representation or warranty as to the accuracy of such information.Efforts are underway to better integrate information from third parties.TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.TI and TI suppliers consider certain information to be proprietary,and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s)at issue in this document sold by TI to Customer on an annual

basis.

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18-Jul-2006

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TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. T esting and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where mandated by government requirements, testing of all parameters of each product is not necessarily performed.

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