TPC10 SERIES CMOS FIELD-PROGRAMMABLE GATE ARRAYS
SRFS001 F -D3864, DECEMBER 1989 -REVISED FEBRUARY 1993
package pin assignments (continued)
2主45____§_ 7 8 9 10 11
AHRM HR -』0000000000000000000000。。。000 。。。。
。。O O O :T O P V I E 明l 1000000 000 000 000 00 00 。。
000 。。0000000000000000000000I /。Pin Assignments for the 84-Pin Ceramic Pin Grid Array Package SIG NAL
TPC1010A TPC1020A PRA
A11 A11 PRB
B10 B10 MOD E
E11 E11 SDI
B11 B11 DCL K
C10 C10 V pp
K2 K2 CLKor 1/0
F9 F9 GND
B7, E 2, E 3, K5, F10, G 10 B7, E 2, E 3, K 5, F 10, G 10 V ee
B5,F1,G2,K7,E9,E10
B5,F1,G2,K7,E9,E10 Ne {No internal connecti 。n)B1, B 2, e 1, e 2, K 1, J 2, L 1,
B2 J10, K 10, K 11, e 11, D10, D 11
NOTES: A. All pins marked GND are ground connections and must be connected t 。circuit ground
B. I/pp must be terminated to V ee except during programming.
e. P再A and PRB, t he diagnostic probe口utputs,sh 。uld remain open if not used as I/Os
D. MODE must be terminated to circuit ground except during programming.t
E. SDI and DeLK should be terminated to circuit ground during normal 。peration if not used as I/Os .
t F . Unused 1/0 pins are automatically designated by the Action Logic System as outputs and should remain unconnected. Unused 1/0 pins are driven low by design.
G. All unidentified pins on the pin assignment drawings are standard I/Os.
t H. Orientation pin e3 is connected internally to pin e2. The security fuse must be programmed for SDI and DeLK to function as I/Os. For device debugging 。
n the user ’s circuit board, M ODE, S DI, and DeLK should be terminated to circuit ground through a 10-kU {or greater) resistor. They can be tied to ground if not debuggi『1g.Figure 38. 84-Pin CPGA Pin Assignment
TPC10 SERIES CMOS FIELD-PROGRAMMABLE GATE ARRAYS
SRFS001 F -D3864, DECEMBER 1989 -REVISED FEBRUARY 1993
package pin assignments (c 。
ntinued),、日,、
(J(J(J o Z ii:(J(J (Jυo z z z ;:;;「C,>「Z zzzz 80 7978 n16 75 74 73 7271706968676665646362 61 60 595857 56 5554535251
81
82
83
84
85
GND 86
GND 87 88
89
CLKorl/0 90
91
MODE 92
Ve e 93
Ve e 94
95
96
97 SDI 。rI /。98
DeLK 。rI /。99
PRA 。r1/0100 。
σ。P V IEW) 。户LW 户』nu nu FU FUW MH MH UV U--RM RM m m喃铺”刚M咽MW “HH MM 们钊ma ma m副ma ma u mωU M川1 2 3 4 5 6 7 8 9101112131415161718192021222324252627282930 (J (J (J (J υ。Q (J (Jυ(J (J zzzzza:a z u zzz z 』0万。I i
NOTES: A. All pins marked GND are ground connections and must be connected to circuit ground.
B. Vpp must be terminated to Vee except during programming.
C. PRAand P百B,the diagnostic probe 。utputs,should remain 。pen if not used as I/Os.
D. MODE must be terminated to circuit ground except during programming.t
E. SDI and DCLK should be terminated to circuit ground during normal operation if not used as 1/0s.t
F. Unused 1/0 pins are automatically designated by the Action L 。g ic System as outputs and should remain unconnected. Unused 1/0 pins are driven low by design.
G. All unidentified pins on the pin assignment drawings are standard I/Os.
H. NC = No internal connection
↑The security fuse must be programmed for SDI and DCLK t 。function as I/Os. For device debugging 。
n the user ’s circuit b。ard,MODE, SDI, and DCLK sh 。uld be terminated to circuit ground through a 10-kil (or greater) resistor. They can be tied to ground if not debugging Figure 42. TPC1020A 100-Pin PQFP Pin Assignment