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AML8726-MX_QRM V0.9 20120117

AML8726-MX_QRM V0.9 20120117
AML8726-MX_QRM V0.9 20120117

AML8726-MX Quick Reference Manual

Revision: 0.9

Release date: 2/10/2012

Amlogic, Inc.

COPYRIGHT

? 2012 Amlogic, Inc.

All rights reserved. No part of this document may be reproduced. Transmitted, transcribed, or translated into any language in any form or by any means with the written permission of Amlogic, Inc.

TRADEMARKS

AMLOGIC is a trademark of Amlogic, Inc. All other trademarks and registered trademarks are property of their respective companies.

DISCLAIMER

Amlogic Inc. may make improvements and/or changes in this document or in the product described in this document at any time.

This product is not intended for use in medical, life saving, or life sustaining applications.

Circuit diagrams and other information relating to products of Amlogic Inc. are included as a means or illustrating typical applications. Consequently, complete information sufficient for production design is not necessarily given. Amlogic makes no representations or warranties with respect to the accuracy or completeness of the contents presented in this document.

REVISION HISTORY

CONTACT INFORMATION

Amlogic, Inc.

3930 Freedom Circle, Suite 101

Santa Clara, CA 95054

U.S.A.

https://www.sodocs.net/doc/db6249111.html,

Contents

1.General Description (4)

2.Features Summary (5)

3.Pin Out Specification (9)

3.1Pin-Out Diagram (top view) (9)

3.2Pin Assignments (10)

3.3Pin Multiplexing Tables (22)

3.4Signal Descriptions (27)

4.Operating Conditions (34)

4.1Absolute Maximum Ratings (34)

4.2Recommended Operating Conditions (34)

4.3DDR3/LPDDR2 SDRAM Timing Specifications (34)

4.3.1Recommended Operating Codditions (34)

4.3.2DC specifications - DDR3 mode (35)

4.3.3DC Specifications - LPDDR2 mode (35)

4.3.4AC specifications - DDR3 mode (35)

4.4Recommended Power on sequence (36)

5.Mechanical Dimensions (37)

1.General Description

AML8726-MX is an advanced connected multimedia processor designed for Tablet/MID, Set Top Box (STB) and high-end media player applications. It integrates powerful CPU/GPU, and a state-of-the-art video decoding engine with all major peripherals to form the ultimate low power multimedia SoC.

The integrated processor is dual core ARM Cortex-A9 CPU with 32KB L1 instruction and 32KB data cache for each core and a large 512KB L2 unified cache to improve system performance. In addition, the Cortex-A9 CPU includes the NEON SIMD co-processor to improve software media processing capability. The dual core ARM Cortex-A9 CPU can run up to 1.5GHz and has a wide bus connecting to the memory sub-system.

The graphic subsystem consists of two graphic engines and a flexible video/graphic output pipeline. The Dual core ARM Mali-400 GPU handles all the OpenGL ES 1.1/2.0 and OpenVG graphics programs, while the 2.5D graphics processor handles additional scaling, alpha, rotation and color space conversion operations. The video output pipeline can perform advanced image correction and enhancements. Together, the CPU and GPU handle all operating system, networking, user-interface and gaming related tasks.

Three additional processors offload the Cortex-A9 CPU by handling all audio and video decoding processing – the MediaCPU and two MediaDSPs with a dedicated hardware video decoders. The MediaCPU is audio optimized and handles all audio decoding tasks. The dual MediaDSPs with hardware decoder can decode all HD video formats including H.264, MVC, MPEG-1/2/4, VC-1/WMV, AVS, RealVideo and MJPEG streams. The video decoding engine is also capable of decoding JPEG pictures with no size limitation.

AML8726-MX integrates complete audio/video input/output interfaces including LVDS/mini-LVDS panel interface with TCON, RGB888 TTL panel interface with TCON, an HDMI1.4a transmitter with 3D support, CEC and PHY, three video DAC supporting composites, CVBS, YPbPr and VGA outputs, I2S and SPDIF digital audio input/output interfaces, a PCM audio interface, a MIPI and a ITU601/656 camera input interfaces.

AML8726-MX integrates a set of functional blocks for digital TV broadcasting streams. The build-in three demux can process the TV streams from three transport stream input interfaces, which can connect to tuner/demodulator. An ISO7816 smart card interface and a crypto-processor build in to help handling encrypted traffic and media streams.

The processor has rich advanced network and peripheral interfaces, including a Gigabit Ethernet MAC with RMII/RGMII interface, dual USB 2.0 high-speed ports (one OTG and one HOST), two SDIOs with multi-standard memory card controller, four UART interfaces, four I2C interfaces, two high-speed SPI interfaces and two PWMs.

Standard development environment utilizing GNU/GCC Android tool chain is supported. Please contact your AMLOGIC sales representative for more information.

2. Features Summary

AML8726-MX

CPU Sub-system

? Dual core ARM Cortex-A9 CPU up to 1.5GHz frequency and 7500DMIPS ? ARMv7 instruction set, multi-issue superscalar, out-of-order architecture ? 32KB instruction cache and 32KB data cache ? 512KB Unified L2 cache

? Advanced NEON and VFP co-processor ? Memory Management Unit

? Advanced TrustZone security system

? Application based traffic optimization using internal QoS-based switching fabrics

3D Graphics Processing Unit

? Unified 64KB cache to reduce graphic data bandwidth ? 800Mpix/sec and 40Mtri/sec

? Full scene over-sampled 4X anti-aliasing engine with no additional bandwidth usage ? OpenGL ES 1.1/2.0 and OpenVG 1.1 support

2.5D Graphics Processor

?Fast bitblt engine with dual inputs and single output

?Programmable raster operations (ROP)

?Programmable polyphase scaling filter

?Supports multiple video formats 4:2:0, 4:2:2 and 4:4:4 and multiple pixel formats (8/16/24/32 bits graphics layer) ?Fast color space conversion

?Advanced anti-flickering filter

Crypto Engine

?Supports AES block cipher with 128/192/256 bits keys, standard 16 bytes block size and streaming

?Supports DES/3DES block cipher with Electronic Code Book (ECB) and Cipher Block Chaining (CBC) operation mode ?Supports standard 64 bits key for DES and 192 bits key for 3DES

?Support streaming decoder with standard 64 bits block size

?Build-in LSFR Random number generator

Video/Picture Decoder

?Dual programmable DSP engines at 200MHz with DSP instructions

?Dedicated hardware video decoder

?H.264 HP@L4.1 up to 1080P, MVC at 30Hz

?MPEG-4 Part 2 ASP up to 1080P (ISO-14496-2)

?WMV/VC-1 SP/MP/AP up to 1080P

?AVS JiZhun Profile up to 1080P

?MPEG-2 MP/HL up to 1080P (ISO-13818)

?MPEG-1 MP/HL up to 1080P (ISO-11172)

?RealVideo 8/9/10 up to 720P

?WebM up to VGA

?Multiple language and multiple format sub-title video support

?Supports *.mkv,*.wmv,*.mpg, *.mpeg, *.dat, *.avi, *.mov, *.iso, *.mp4, *.rm and *.jpg file formats

?MJPEG and JPEG unlimited pixel resolution decoding (ISO/IEC-10918)

?Supports JPEG thumbnail, scaling, rotation and transition effects

Video Post-Processing Controller

?Motive adaptive 3D noise reduction filter

?Advanced motion adaptive edge enhancing de-interlacing engine

?3:2 pull-down support

?Programmable poly-phase scalar for both horizontal and vertical dimension for zoom and windowing

?Programmable color management filter (to enhance blue, green, red, face and other colors)

?Chroma coring and black extension processing

?Dynamic Non-Linear Luma filter

?Programmable color matrix pipeline

?Video mixer: 2 video planes and 2 graphics planes

Digital LCD Panel Output

?TTL, LVDS and mini-LVDS panel supporting

?Single port LVDS/mini-LVDS with TCON supporting both single and dual-gate panels up to 1366x768 resolution ?RGB888 TTL interface with TCON supporting digital panel up to 1920x1200 resolution

?LED BL PWM and VGHL PWM build-in

?Three independent Gamma table for LCD panel tuning

?Dithering logic for mapping to different LCD panel color depth

Video Output

?Build-in HDMI 1.4a transmitter with CEC, both controller and PHY

?Programmable 3 channels high speed video DACs for analog video output including CVBS, S-Video, YPbPr and VGA ?Supports all standard SD/HD video output formats: 480i/p, 576i/p, 720p and 1080i/p

?Supports dual video output with combination of LCD+HDMI, TTL+LVDS or CVBS+HDMI

?Supports 3D LCD panel and 3D HDMI display

Audio Decoder and Input/Output

?MediaCPU with DSP audio processing

?Supports MP3, AAC, WMA, RM, FLAC, Ogg and programmable with 7.1 down-mixing

?I2S , SPDIF/IEC958 and PCM serial digital audio output

?Supports concurrent dual audio stereo channel output with combination of I2S+PCM

Other Digital Audio/Video Input/Output Interfaces

?ITU 601/656 parallel video input with down-scalar

?MIPI camera interface with 4 lanes and 1GHz per lane

?Supports camera input as YUV422, RGB565, 10bit rawRGB ,16bit RGB or JPEG

Memory and Storage Interface

?Supports DDR3-1066 SDRAM with 32-bit data bus

?Supports up to 2GB DDR3/DDR3L/DDR3U/LPDDR2 memory

?TrustZone protected DRAM memory region and internal SRAM

?Supports SLC/MLC/TLC NAND Flash with 4 chip enable pins with BCH60

?Supports serial NOR Flash via SPI interface

?Build-in 4kbits One-Time-Programming ROM for key storage

?SDIO with memory card controller with 8-bit data bus supporting SD/SDHC/SDXC/MMC/MS/MS-Pro memory cards

Network

?Integrated IEEE 802.3 10/100/1000 Gigabit Ethernet controller with RMII/RGMII interface.

?Supports Energy Efficiency Ethernet (EEE) mode

?Optional 50MHz and 125MHz clock output to Ethernet PHY

?WiFi/IEEE802.11 supporting via SDIO/USB

Digital Television Interface

?Three transport stream(TS) input interfaces with three build-in demux processor for connecting to external digital TV tuner/demodulator and one output TS interface

?Build-in PWM, I2C and SPI interfaces to control tuner and demodulator

?CI+ PCMCIA controller and interface

?Integrated ISO 7816 smart card controller

Integrated I/O Controllers and Interfaces

?Dual USB 2.0 high-speed USB I/O, one USB Host and one USB OTG

?Four UART Interfaces with RTS/CTS

?Two I2C master interfaces and two I2C slave interfaces

?Two high speed bi-directional SPI interfaces

?Dual PWM channels with feedback control logic

?Programmable IR remote controller

?Build-in 10bit SAR ADC with 8 input channels with resistive touch panel controller

? A set of General Purpose IO interfaces

System, Peripherals and Misc. Interfaces

?Multiple power domains

?Dedicated always-on (AO) power domain to communicate with external PMIC

?Integrated general purpose timers, counters, DMA controllers

?Integrated RTC with battery backup option

?Single 24 MHz crystal oscillator input

?Embedded debug interface using ICE/JTAG

?AMPOWER power management circuits supporting multiple sleep and suspend operating modes ?Optional encrypted secure boot

Software

?Supports Android and Linux operating systems

?GNU/GCC Android tools chain

Package

?487-ball LFBGA, RoHS compliant

3.Pin Out Specification 3.1Pin-Out Diagram (top view)

3.2Pin Assignments

The AML8726-MX A/V processor pin assignment is described in the following table.

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