7545ARPDS中文资料

Memory

12-Bit Buffered Multiplying 7545A

Digital to Analog Converter

REF

V

V DD DGND AGND

OUT1DB11-DBO

INPUT DATA LATCHES

DAC

12

1212-BIT MULTIPYING

R FB R

WR CS

F EATURES :

?R AD -P AK ? patented shielding against natural space radia-tion

?Total dose hardness:

- > 100 krad (Si), depending upon space mission ?Excellent single event effects - SEL TH : > 120 MeV/mg/cm 2

- SEU TH : > 120 MeV/mg/cm 2 using all 1’s ?Package:

- 20 pin R AD -P AK ? Flat Pack - 20 pin R AD -P AK ? DIP

?Low gain temperature coefficient:- 5 ppm/°C typ.?Fast interface timing

?Single +5 V to +15 V supply

D ESCRIPTION :

Maxwell Technologies’ 7545A is a 12-bit CMOS-buffered mul-tiplying DAC with internal data latches, which features a greater than 100 krad (Si) total dose tolerance, depending upon space mission. The 7545A features a WR pulse width of 100 ns which allows interfacing to a much wider range of fast 8-bit and 16-bit microprocessors. It is loaded by a single 12-bit wide word under the control of the CS and WR inputs; tying these control inputs low makes the input latches transparent allowing unbuffered operation of the DAC. The 7545A is par-

ticularly suitable for single supply operations and applications with wide temperature variations.

Maxwell Technologies' patented R AD -P AK ? packaging technol-ogy incorporates radiation shielding in the microcircuit pack-age. It eliminates the need for box shielding while providing the required radiation shielding for a lifetime in orbit or space mission. In a GEO orbit, R AD -P AK provides greater than 100krad (Si) radiation dose tolerance. This product is available with screening up to Class S.

Memory

T ABLE 1. 7545A P INOUT D ESCRIPTION

P IN S YMBOL D ESCRIPTION 1OUT 1Output Current 2AGND Analog Ground 3DGND Digital Ground 4DB 11Data Bit 11 (MSB)5DB 10Data Bit 106DB 9Data Bit 97DB 8Data Bit 88DB 7Data Bit 79DB 6 Data Bit 610DB 5Data Bit 511DB 4Data Bit 412DB 3Data Bit 3

13DB 2Data Bit 214DB 1Data Bit 115DB 0Data Bit 0 (LSB)16 CS

Chip Select (Active Low)17WR Write (Active Low)18V DD Digital Supply Voltage 19V REF Reference Input 20

RFB

Feedback Resistance

T ABLE 2. 7545A A BSOLUTE M AXIMUM R ATINGS

P ARAMETER S YMBOL M IN M AX U NIT V DD to DGND

---0.317V Digital Input Voltage to DGND ---0.3V DD + 0.3V V RFB , V REF to DGND ----25V V PIN1 to DGND ---0.3V DD + 0.3V AGND to DGND ---0.3V DD + 0.3V Power Dissipation to 75 °C P D

--450mW Thermal Impedance — Flat Package ΘJC -- 6.08°C/W Thermal Impedance — DIP Package ΘJC

-- 6.04°C/W

Operating Temperature ---55125°C Storage Temperature Range

T S

-65

150

°C

Memory

T ABLE 3. D ELTA L IMITS

P ARAMETER V ARIATION I DD

±10%

T ABLE 4. 7545A S PECIFICATIONS

(V DD = +5 V ±10%, T A = -55 TO 125 °C UNLESS OTHERWISE NOTED )

T EST S YMBOL T EST C ONDITION

M IN M AX U NIT Resolution RES 12--Bits Relative Accuracy RA -1/21/2LSB Differential Nonlinearity DNL 12-Bit Monotonic T MIN to T MAX -11LSB Gain Error 1

1.Measured using feedback resistor.A E DAC Register Loaded with 1111 1111 1111-44LSB Gain Temperature Coefficient 2

2.Guaranteed by design.TC AE -55ppm/°C

Power Supply Rejection PSRR V DD = 5%

-0.0040.004%/%Output Current Settling Time 2

t SL

To 1/2LSB; OUT1 Load = 100?, DAC Output Measured from Fall-ing Edge of WR. CS = 0V --2

μs

Feed through Error

FT 5 (typical)

mV p-p Reference Input Resistance (Pin 19 to Ground)2

R IN 1025K ?Digital Input High Voltage V IH 2.4--V Digital Input Low Voltage V IL --0.8V Digital Input Leakage Current I IN V IN = 0 V or V DD -1010μA Digital Input Capacitance 2C IN DB0 - DB11; WR, CS

--20pF Output Capacitance 2

C OUT1DB0 - DB11 = 0 V, WR, CS = 0V --70pF

DB0 - DB11 = V DD , WR, CS = 0V

--200Chip Select to Write Setup Time 33.Not Tested.

t CS t CS > t WR , t CH > 0

380--nS

Chip Select to Write Hold Time 3t CH 0--Write Pulse Width 3t WR 400--Data Setup Time 3t DS 210--Data Hold Time 3

t DH 10--Supply Current from V DD

I DD

All Digital Inputs V IL or V IH --2mA All Digital Inputs 0 or V DD --

500

μA

Memory

T ABLE 5. 7545A S PECIFICATIONS

(V DD = +15 V ±10%, T A = -55 TO 125 °C UNLESS OTHERWISE NOTED )

T EST

S YMBOL T EST C ONDITION

M IN M AX U NIT Relative Accuracy RA -1/21/2LSB Differential Nonlinearity DNL 12-Bit Monotonic T MIN to T MAX -11LSB Gain Error 1

1.Measured using feedback resistor.A E DAC Register Loaded with 1111 1111 1111-44LSB Gain Temperature Coefficient 2

2.Guaranteed by design.

TC AE

-55ppm/°C Power Supply Rejection PSRR V DD = 5% -0.0040.004%/%Output Current Settling Time 2

t SL To 1/2LSB; OUT1 Load = 100?,

DAC Output Measured from Fall-ing Edge of WR. CS = 0V --2

μs

Feed through Error

FT 5 (typical)

mV p-p Reference Input Resistance (Pin 19 to Ground)2

R IN 1025K ?

Digital Input High Voltage V IH 13.5--V Digital Input Low Voltage V IL -- 1.5V Digital Input Leakage Current I IN V IN = 0 V or V DD -1010μA Digital Input Capacitance 2C IN DB0 - DB11; WR, CS

--15pF Output Capacitance 2

C OUT1DB0 - DB11 = 0 V, WR, CS = 0V --70pF

DB0 - DB11 = V DD , WR, CS = 0V

--150Chip Select to Write Setup Time t CS t CS > t WR , t CH > 0

95--nS

Chip Select to Write Hold Time t CH 0--Write Pulse Width 3t WR 95--Data Setup Time 3t DS 80--Data Hold Time 3

t DH 5--Supply Current from V DD

I DD

All Digital Inputs V IL or V IH --2mA All Digital Inputs 0 or V DD

--100

μA

Memory

F

IGURE 1. W RITE C YCLE T IMING D IAGRAM

F IGURE 2. M ODE S ELECTION T ABLE

MODE SELECTION

WRITE MODE: CS and WR low, DAC responds to data bus (DB0 - DB11) inputs HOLD MODE:

Either CS or WR high, data bus (DB0 - DB11) is locked out; DAC holds last data

present when WR or CS assumed high state.

Memory

D20-01

Note: All dimensions in inches

20 P IN R AD -P AK ? D UAL I N L INE P ACKAGE

S YMBOL

D IMENSION M IN

N OM M AX A --0.2020.230b 0.0140.0180.026b20.0450.0500.065c 0.0080.0100.018D -- 1.000 1.060E 0.220

0.2900.310

eA 0.300 BSC eA/20.150 BSC e 0.100 BSC L 0.1250.1450.155Q 0.0150.0450.070S10.0050.025--S20.005----N

20

Memory

F20-01

Note: All dimensions in inches

20 P IN R AD -P AK ? F LAT P ACKAGE

S YMBOL

D IMENSION M IN

N OM M AX A 0.1280.1410.154b 0.0150.0170.022c 0.0030.0050.009D 0.4700.4800.490E 0.2870.2950.303E1----0.333E20.1550.160--E30.030

0.068--

e 0.050 BSC L 0.3500.3800.390Q 0.0260.0340.045S10.0050.007--N

20

Important Notice:

These data sheets are created using the chip manufacturers published specifications. Maxwell Technologies verifies

functionality by testing key parameters either by 100% testing, sample testing or characterization.

The specifications presented within these data sheets represent the latest and most accurate information available to

date. However, these specifications are subject to change without notice and Maxwell Technologies assumes no responsibility for the use of this information.

Maxwell Technologies’ products are not authorized for use as critical components in life support devices or systems

without express written approval from Maxwell Technologies.

Any claim against Maxwell Technologies must be made within 90 days from the date of shipment from Maxwell Tech-

nologies. Maxwell Technologies’ liability shall be limited to replacement of defective parts.

Memory

Memory

Product Ordering Options

Model Number

Feature Option Details

7545A

RP

F

X

Screening Flow

Package

Radiation Feature

Base Product Nomenclature

S = Maxwell Class S B = Maxwell Class B

E = Engineering (testing @ +25°C)I = Industrial (testing @ -55°C, +25°C, +125°C)

D = Dual In-line Package (DIP)F = Flat Pack

RP = R AD -P AK ? package

12-Bit Buffered Multiplying Digital to Analog Converter