300mA的超低噪声小封装超高速CMOS LDO稳压器LP3984

300mA,Ultra-low noise, Small Package

Ultra-Fast CMOS LDO Regulator

General Description

The LP3984 is designed for portable RF and wireless applications with demanding performance and space requirements. The LP3984 performance is optimized for battery-powered systems to deliver ultra low noise and low quiescent current. A noise bypass pin is available for further reduction of output noise. Regulator ground current increases only slightly in dropout, further prolonging the battery life. The LP3984 also works with low-ESR ceramic capacitors, reducing the amount of board space necessary for power applications, critical in hand-held wireless devices. The LP3984 consumes less than 0.01μA in shutdown mode and has fast turn-on time less than 50μs. The other features include ultra low dropout voltage, high output accuracy, current limiting protection, and high ripple rejection ratio. It is available in the 5-lead of SOT23-5 packages.

Ordering Information

LP3984 □ □ □ □ □

F: Pb-Free

Package Type B5: SOT23-5 Output Voltage Type 12: 1.2V 13: 1.3V 15: 1.5V 18: 1.8V

25: 2.5V 28: 2.8V 2H: 2.85V

30: 3.0V 33: 3.3V

Features

◆ Ultra-Low-Noise for RF Application ◆ 2V- 6.5V Input Voltage Range ◆ Low Dropout : 200mV @ 300mA

◆ 1.2V, 1.3V,1.5V, 1.8V, 2.5V, 2.8V 3.0V and

3.3V Fixed ◆ 300mA Output Current, 550mA Peak Current ◆ High PSSR:-73dB at 1KHz

◆ < 0.01uA Standby Current When Shutdown ◆ Available in SOT23-5 Package ◆ TTL-Logic-Controlled Shutdown Input ◆ Ultra-Fast Response in Line/Load transient ◆ Current Limiting and Thermal Shutdown Protection

◆ Quick start-up (typically 50uS)

VOUT

Applications

? Portable Media Players/MP3 players ? Cellular and Smart mobile phone ? LCD

? DSC Sensor ? Wireless Card

Pin Configurations

BP

VOUT

Top View

Marking Information

Function Block Diagram

EN

BP

Absolute Maximum Ratings

Supply Input Voltage----------------------------------------------------------------------------------------------------------6.5V Power Dissipation, PD @ TA = 25°C

SOT23-5 -------------------------------------------------------------------------------------------------------------------400mW Package Thermal Resistance

SOT23-5, θJA ----------------------------------------------------------------------------------------------------------250°C/W Lead Temperature (Soldering, 10 sec.) -----------------------------------------------------------------------------260°C Storage Temperature Range ----------------------------------------------------------------------------- ?65°C to 150°C ESD Susceptibility

HBM (Human Body Mode) ------------------------------------------------------------------------------------------------2kV MM(Machine-Mode)--------------------------------------------------------------------------------------------------------200V Recommended Operating Conditions

Supply Input Voltage----------------------------------------------------------------------------------------------2.5V to 5.5V EN Input Voltage -----------------------------------------------------------------------------------------------------0V to 5.5V Operation Junction Temperature Range ----------------------------------------------------------------?40°C to 125°C Operation Ambient Temperature Range-------------------------------------------------------------------?40°C to 85°C

Electrical Characteristics

(VIN = VOUT + 1V, CIN = COUT = 1μF, CBP = 22nF, TA = 25° C, unless otherwise s pecified)

Typical Operating Characteristics

ILoad=200mA

Applications Information

Like any low-dropout regulator, the external capacitors used with the LP3984 must be carefully selected for regulator stability and performance. Using a capacitor whose value is > 1μF on the LP3984 input and the amount of capacitance can be increased without limit. The input capacitor must be located a distance of not more than 0.5 inch from the input pin of the IC and returned to a clean analog ground. Any good quality ceramic or tantalum can be used for this capacitor. The capacitor with larger value and lower ESR (equivalent series resistance) provides better PSRR and line-transient response. The output capacitor must meet both requirements for minimum amount of capacitance and ESR in all LDOs application. The LP3984 is designed specifically to work with low ESR ceramic output capacitor in space-saving and performance consideration. Using a ceramic capacitor whose value is at least 1μF with ESR is > 25m? on the LP3984 output ensures stability. The LP3984 still works well with output capacitor of other types due to the wide stable ESR range. Figure 1 shows the curves of allowable ESR range as a function of load current for various output capacitor values. Output capacitor of larger capacitance can reduce noise and improve load transient response, stability, and PSRR. The output capacitor should be located not more than 0.5 inch from the VOUT pin of the LP3984 and returned to a clean analog ground.

Start-up Function Enable Function

The LP3984 features an LDO regulator enable/disable function. To assure the LDO regulator will switch on, the EN turn on control level must be greater than 1.4 volts. The LDO regulator will go into the shutdown mode when the voltage on the EN pin falls below 0.4 volts. For to protecting the system, the LP3984 have a quick-discharge function. If the enable function is not needed in a specific application, it may be tied to VIN to keep the LDO regulator in a continuously on state.

Bypass Capacitor and Low Noise Connecting a 22nF between the BP pin and GND pin significantly reduces noise on the regulator output, it is critical that the capacitor connection between the BP pin and GND pin be direct and PCB traces should be as short as possible. There is a relationship between the bypass capacitor value and the LDO regulator turn on time. DC leakage on this pin can affect the LDO regulator output noise and voltage regulation performance.

Thermal Considerations

Thermal protection limits power dissipation in LP3984. When the operation junction temperature exceeds 165°C, the OTP circuit starts the thermal shutdown function turn the pass element off. The pass element turns on again after the junction temperature cools by 30°C. For con tinue operation, do not exceed absolute maximum operation junction temperature 125°C.

The power dissipation definition in device is :

PD = (VIN?VOUT) x IOUT + VIN x IQ

The maximum power dissipation depends on the thermal resistance of IC package, PCB layout, the rate of surroundings airflow and temperature difference between junction to ambient.

The maximum power dissipation can be calculated by following formula :

PD(MAX) = ( TJ(MAX) ? TA ) /θJA

Where

TJ(MAX) is the maximum operation junction temperature 125°C, TA is the ambient temperature and the θJA is the junction to ambient thermal resistance. For recommended operating conditions specification of LP3984, where

TJ(MAX) is the maximum junction temperature of the die (125°C) and TA is the maxi mum ambient temperature. The junction to ambient thermal resistance (θJA is layout dependent) for SOT23-5 package is 250°C/W.

PD(MAX) = (125°C?25°C) / 250 = 400mW (SOT23-5) PD(MAX) = (125°C?25°C) / 165 = 606mW (with PCB PAD)

The maximum power dissipation depends on operating ambient temperature for fixed TJ(MAX) and thermal resistance θJA.

Packaging Information