Rev. 1.1 12/03Copyright ? 2003 by Silicon Laboratories
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S O FT W A R E SPI E X A M P L E S F O R T H E C8051F30X F A M I L Y Relevant Devices
This application note applies to the following devices:C8051F300, C8051F301, C8051F302, and C8051F303.
Introduction
This application note is a collection of routines that can be used to implement a master-mode SPI device in software. Eight different examples of a SPI master-mode transfer are provided. The exam-ples contain two functions for each of the SPI clock phase and polarity options: an example written in
‘C’, and for increased speed, an assembly routine
that can be called from ‘C’. An example of how to
call the routines from a ‘C’ program and an
EEPROM interface example are also provided. SPI
is a trademark of Motorola Inc.
The SPI functions described in this document are
written to minimize the software overhead required for the SPI transaction. They are intended for use in a system where the C8051F30x device is the only SPI master on the bus.
Hardware Interface
These examples implement the SPI interface using three GPIO pins for transactions:MOSI (Master Out / Slave In): This pin is used for serial data output from the C8051F30x, and should be configured as a digital push-pull output.MISO (Master In / Slave Out): This pin is used for serial data input from the slave device, and should be configured as an open-drain digital pin.SCK (Serial Clock): This pin is used as the serial data clock output from the C8051F30x device, and should be configured as a digital push-pull output.
Additionally, if a slave select signal is required for the slave device, a fourth GPIO pin is needed, and must be declared as a digital push-pull output for this purpose. All of the dedicated GPIO pins should
be skipped by the crossbar. Figure 1 shows the con-nections between the SPI master (C8051F30x) and SPI slave devices.Function Descriptions
There are eight examples of a software SPI master contained in this applications note. Each of the four
different SPI modes (Mode 0, Mode 1, Mode 2 and
Mode 3) are given as examples in both ‘C’ and assembly. Table 1 lists the source files for each implementation. All of the routines can be called
from ‘C’ using the same function prototype.
Because of this, only one of the sample implemen-tations should be included when building a project.The functions can be renamed if multiple SPI
modes are needed in the same system.
Figure 1. Hardware Configuration
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Figure 2. Serial Clock Phase / Polarity
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Figure 3. Timing For Mode 0 and Mode 3
Figure 4. Timing For Mode 1 and Mode 2
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Figure 5. EEPROM Connection
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