半期样卷4
I. To fill the answers in the “( )” (2’ X 19=38)
1. [1776 ]8 = ( )16 = ( )2= ( ) Gray .
2. (365)10 = ( )8421BCD ＝( ) 2421 BCD .
3. Given an 12-bit binary number N. if the integer ’s part is 9 bits and the fraction ’s part is 3 bits ( N = a 8 a 7 a 6 a 5 a 4 a 3 a 2 a 1 a 0 . a -1 a -2 a -3), then the maximum decimal number it can represent is ( ); the smallest non-zero decimal number it can represent is ( ).
4. If X ’s signed-magnitude representation X SM is （110101）2, then it ’s 8-bit two ’s complement representation X 2’s COMP is( ) , and (–X)’s 8-bit complement representation (–X) 2’s
COMP is (
)2 .
5. If there are 2011 different states, we need at least ( ) bits binary code to represent them.
6. If a positive logic function expression is F=AC ’+B ’C(D+E)，then the negative logic function expression F = ( ).
7. A particular Schmitt-trigger inverter has V ILmax = 0.7 V , V IHmin = 2.1 V , V T+ = 1.7 V , and V T-= 1.3 V , V OLmax =0.3V , V OHmin =2.7V . Then the DC noise margin in the HIGH state is ( ), the hysteresis is ( ). 8. The unused CMOS NAND gate input in Fig. 1 should be tied to logic ( ).
9. If number [ A ] two’s -complement =11011001 and [ B] two’s -complement =10011101 , calculate
[-A-B ] two’s -complement , [-A+B ] two’s -complement and indicate whether or not overflow occurs. [-A-B ] two’s -complement =[ ], overflow: [ ]
Fig.1 Circuit of problem I-8
[-A+B ] two’s -complement =[ ], overflow: [ ]
.10. The following logic diagram Fig.2 implements a function of 3-variable with a 74138. The logic function can be expressed as F (A,B,C) = ∑A,B,C ( ).
Fig.2 Circuit of problem I-10
II. There is only one correct answer in the following questions.(3’ X 9 = 27)
1. Which of the following Boolean equations is NOT correct? ( )
A) A+0=A B) A ⊕1 = A C) A A =?1
D) ()A B 'A'B'?=+
2. Suppose A 2’s COMP =（1011），B 2’s COMP =（1010），C 2’s COMP =（0010）. In the following equations, the most unlikely to produce overflow is （ ）。
A)（A+B ）2’s COMP B) (A-C) 2’s COMP C) (B+C) 2’s COMP D) (C-A) 2’s COMP
3. What is the possible radix of the number system in operation of 302/20=12.1. ( )
A) 7
B) 4
C) 5
D) 8
4. A 16-to-1 multiplexer need ( ) control inputs.
A) 3
B) 4
C) 6
D) 8
5. If the canonical sum for an n-input logic function is also a minimal sum, how many literals are in
each product term of the sum? ( )
A) n
B) 2n
C) n-1
D) cannot be determined.
6. A priority encoder 74LS148’s input is: I 0-L , I 1-L , I 2-L , I 3-L , I 4-L , I 5-L , I 6-L , I 7-L ，output is Y 2-L ,Y 1-L ,Y 0-L .The inputs and output are all active-low. When active-low enable input S _L =0 ,and I 2-L =I 4-L =I 5-L =0, then Y 2-L ,Y 1-L ,Y 0-L is ( ). A) 110
B) 010
C) 001
D) 101
7. There are two logic functions with same 4 input variables: F1 = ∑ABCD (1,2,6,7,10,12) and F2 = ∏ABCD (3,5,8,9,13,14). The relationship between them is （ ）。
A). Shannon ’s expansion
B). Equivalent
C). Duality D). Complement
8. How many inverters can be driven by the same inverter M G for the 74LS TTL families in Fig. 3. When the output of M G in hign and low levels are
V
2.30H ≥V ，
V
25.0OL ≤V , the input currents are
25.0 20 , 4.0OL IH IL ≤≤-≤V A I mA I 。μ, the maximum output
current V 2.3 ,mA 8OH (m ax)OL ≥=V I , the maximum output current
(m ax)OH I = —0.4mA. ( )
A) 5 B) 10 C) 15 D) 20
9. A CMOS gate circuit is shown as Fig 4. The function
expression for the circuit is ( ). A) (AB+BC)’ B) (AC+BC)’ C)( AB+AC)’ D) AB+AC
Fig. 3 Circuit of problem
III. Combinational Circuit Analysis And Design: [35]
1. Minimize the logic function expression to realize the circuit with as less gates as possible. [5’]
F = AB’(C + D) + BC’ + A’B’ + A’C + BC
Fig 4 circuit of problem II-9
F = AB’(C+D) + B(C+C’)+A’B’+A’C (1’)
= AB’(C+D)+ B+A’B’+ A’C (1’)
= A(C+D)+ B+A’+ A’C (2’)
= C+D+A’+B (1’)
2. Simplify the following logic function into the minimal sum expression and minimal product expression using Karnaugh map.
F(A,B,C,D)= ∑m(0,4,7,11,15)+ ∑d(1,5,8,9,10,12,13,14)[5’]
CD
AB
00
01
11
1000011110
d
d d d
011
d
11
d
00
1
d
d
CD
AB
00
01
11
10
00011110
d
d d d
011
d
11
d
00
1
d
d
(3’)
the minimal sum expression :F = A+C’+BD (1’)
the minimal product expression F =（A+B+ C’）(C’+ D) (1’)
3. There is a logic circuit and the inputs A,B and C are corresponding to the outputs F A,F B and
F C .The waveforms of inputs and outputs are shown in Fig. 5. Please write out the truth table include all the inputs and outputs, and the logic expression of the outputs F A, F B and F C, and describe the logic function.[10’]
(6’)
Fig. 5 Waveforms of problem III-3 F A = AB ’C ’ (1’) F B = BC ’ (1’) F C = C (1’)
逻辑功能：该电路为优先权排序电路，C 具有最高优先权，B 次之，A 的优先权最低。(1’)
4. Analysis the combinational logic circuit shown in the Fig. 6, and write out the logic expression. Determine whether the static hazard may exist or not in the circuit. If the static hazard exists, please check it out and fix it. And write out the fixed product-of- sum expression. [7’]
A B
C
Y
Fig. 6 Circuit of problem III-4 exist the static hazard (1’)
AB
01
0001111010
100
1
F=(A+B ’+C)(A+C ’)(A ’+C ’) (3’) the fixed product-of- sum expression ：
F=(A+B ’+C)(A+C ’)(A ’+C ’)(A+B ’)(B ’+C ’)(B+C ’)或 F=(A+B ’+C)(A+C ’)(A ’+C ’) (A+B ’)C ’或 F = (A+B ’)C ’ (3’)
5. There are three desks A,B, and C in an office and there is a dome light switch beside each desk. Try to design a logic control circuit with 8-to-1 Multiplexer 74X151, which can enable every switch control the dome light on or off separately. [8’]
设A,B,C 为三个开关，F 为灯的状态，开关按下为1，恢复为0，灯亮为1，灯灭为0.
可得真值表如下：
EN A B C D0 D1 D2 D3 D4 D5 D6 D7
Y Y
74x151 Fig. 7 Circuit of problem III-5
（4’）
F
(A,B,C) = ∑(1,2,4,7) 连接电路图（略）(4’)
I. To fill the answers in the “( )”(2’ X 19=38)
1.3FE11111111101000000001
2.001101100101001111001011.
3.511.875 0.125
4.11101011 00010101
5. 11
6.(A+C’)(B’+(C+DE))
7.0.6V0.4V
8. 1
9. [-A-B ]two’s-complement=[ 10001010], overflow: [ yes ] [-A+B ]two’s-complement=[ 11000100], overflow: [ no]
.10. ∑A,B,C ( 0,1,2 ).
II. There is only one correct answer in the following questions.(3’ X 9 = 27) BCBBA BCDC