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July 2006 Rev 61/15

STP10NK80ZFP

STP10NK80Z - STW10NK80Z

N-channel 800V - 0.78? - 9A - TO-220/FP-TO-247

Zener-protected superMESH TM MOSFET

General features

■Extremely high dv/dt capability ■100% avalanche tested ■Gate charge minimized ■Very low intrinsic capacitances ■

Very good manufacturing repeability

Description

The SuperMESH? series is obtained through an extreme optimization of ST’s well established strip-based PowerMESH? layout. In addition to pushing on-resistance significantly down, special care is taken to ensure a very good dv/dt

capability for the most demanding applications.

Applications

■

Switching application

Type V DSS R DS(on)I D Pw STP10NK80Z 800V <0.90?9A 160 W STW10NK80Z 800V <0.90?9A 160 w STP10NK80ZFP

800V

<0.90?

40 W

https://www.sodocs.net/doc/0f4376091.html,

Order codes

Part number Marking Package Packaging STP10NK80Z P10NK80Z TO-220T ube STP10NK80ZFP P10NK80ZFP TO-220FP T ube STW10NK80Z

W10NK80Z

TO-247

T ube

Contents STP10NK80ZFP - STP10NK80Z - STW10NK80Z

Contents

1Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

2Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

2.1Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3Test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 4Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 5Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

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STP10NK80ZFP - STP10NK80Z - STW10NK80Z Electrical ratings

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1 Electrical ratings

Table 1.

Absolute maximum ratings

Symbol Parameter

Value

Unit

TO-220/ TO-247

TO-220FP

V DS Drain-source voltage (V GS = 0)800V V DGR Drain-gate voltage (R GS = 20K ?)800V V GS Gate-source voltage

± 30

V I D Drain current (continuous) at T C = 25°C 99(1)1.Limited only by maximum temperature allowed A I D Drain current (continuous) at T C =100°C 66(1)A I DM (2)2.Pulse width limited by safe operating area Drain current (pulsed)3636(1)A P TOT

Total dissipation at T C = 25°C 16040W Derating Factor

1.28

0.32W/°C Vesd(G-S)G-S ESD (HBM C=100pF , R=1.5k ?)4KV dv/dt (3)3.I SD ≤9A, di/dt ≤200A/μs,V DD ≤ V (BR)DSS , T j ≤ T JMAX

Peak diode recovery voltage slope 4.5V/ns V ISO Insulation withstand voltage (DC)--2500

V T J T stg

Operating junction temperature

Storage temperature

-55 to 150

°C Table 2.

Thermal data

Symbol Parameter

Value

Unit

TO-220TO-220FP

TO-247R thj-case Thermal resistance junction-case Max 0.78

3.1

0.78°C/W R thj-a Thermal resistance junction-ambient Max 62.5

°C/W T l

Maximum lead temperature for soldering

purpose

300°C Table 3.

Avalanche characteristics

Symbol Parameter

Value Unit I AS Avalanche current, repetitive or not-repetitive (pulse width limited by Tj Max)9A E AS

Single pulse avalanche energy

(starting Tj=25°C, Id=Iar, Vdd=50V)

290

Electrical characteristics STP10NK80ZFP - STP10NK80Z - STW10NK80Z

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2 Electrical characteristics

(T CASE =25°C unless otherwise specified)Table 4.

On/off states

Symbol Parameter

Test condictions Min.Typ.Max.Unit V (BR)DSS Drain-source breakdown

voltage

I D = 1mA, V GS = 0800

V I DSS Zero gate voltage drain current (V GS = 0)

V DS = Max rating,V DS = Max rating @125°C 150

μA μA I GSS Gate body leakage current (V DS = 0)

V GS = ±20V

±10

nA V GS(th)Gate threshold voltage V DS = V GS , I D = 100μA 3

3.75

4.5V R DS(on)

Static drain-source on resistance

V GS = 10V , I D = 4.5A

0.78

0.9

Table 5.

Dynamic

Symbol Parameter

Test condictions Min.

Typ.Max.

Unit g fs (1)1.Pulsed: pulse duration=300μs, duty cycle 1.5%

Forward transconductance V DS =15V , I D = 4.5A

9.6S C iss C oss C rss

Input capacitance Output capacitance Reverse transfer capacitance

V DS =25V , f=1 MHz, V GS =0

218020538pF pF pF C oss eq (2).2.C oss eq. is defined as a constant equivalent capacitance giving the same charging time as C oss when V DS

inceases from 0 to 80% V DSS

Equivalent output

capacitance

V GS =0, V DS =0V to 640V 105pF Q g Q gs Q gd

Total gate charge Gate-source charge Gate-drain charge

V DD =640V , I D = 9A V GS =10V (see Figure 19)

7212.537

nC nC nC

STP10NK80ZFP - STP10NK80Z - STW10NK80Z Electrical characteristics

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Table 6.

Switching times

Symbol Parameter

Test condictions Min.

Typ.Max.

Unit t d(on)t r Turn-on Delay Time Rise Time

V DD =400 V , I D =4.5A, R G =4.7?, V GS =10V (see Figure 20)3020

ns ns

t d(off)t f

Turn-off Delay Time Fall Time V DD =400 V , I D =4.5A, R G =4.7?, V GS =10V (see Figure 20)

6517ns ns

Table 7.

Gate-source zener diode

Symbol

Parameter

Test condictions Min.Typ.

Max.

Unit BV GSO (1)1.The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device’s

ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be applied from gate to source. In this respect the Zener voltage is appropriate to achieve an efficient and cost-effective intervention to protect the device’s integrity. These integrated Zener diodes thus avoid the usage of external components.

Gate-Source Breakdown

Voltage

Igs=±1mA (Open Drain)

Table 8.

Source drain diode

Symbol Parameter

Test condictions

Min

Typ.

Max Unit I SD Source-drain current 9A I SDM (1)1.Pulse width limited by safe operating area Source-drain current (pulsed)36A V SD (2)2.Pulsed: pulse duration=300μs, duty cycle 1.5%

Forward on voltage I SD =9A, V GS =0 1.6

V t rr Q rr I RRM

Reverse recovery time Reverse recovery charge Reverse recovery current

I SD =9A,

di/dt = 100A/μs,V DD =45V , Tj=150°C

6456.420

ns μC A

Electrical characteristics STP10NK80ZFP - STP10NK80Z - STW10NK80Z

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2.1 Electrical characteristics (curves)

Figure 5.

Safe operating area for TO-247Figure 6.

Thermal impedance for TO-247

STP10NK80ZFP - STP10NK80Z - STW10NK80Z Electrical characteristics Figure 7.Output characterisics Figure 8.Transfer characteristics

Figure 9.Transconductance Figure 10.Static drain-source on resistance

Figure 11.Gate charge vs gate-source voltage Figure 12.Capacitance variations

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Electrical characteristics

STP10NK80ZFP - STP10NK80Z - STW10NK80Z 8/15

Figure 13.Normalized gate threshold voltage

Figure 14.Normalized on resistance vs

Figure 15.Source-drain diode forward

Figure 16.Normalized B VDSS vs temperature

Figure 17.Maximum avalanche energy vs

STP10NK80ZFP - STP10NK80Z - STW10NK80Z Test circuit

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3 Test circuit

Figure 18.Switching times test circuit for

Figure 19.Gate charge test circuit

Figure 20.Test circuit for inductive load

Figure 21.Unclamped Inductive load test

Figure 22.Unclamped inductive waveform Figure 23.

Switching time waveform

Package mechanical data STP10NK80ZFP - STP10NK80Z - STW10NK80Z 4 Package mechanical data

In order to meet environmental requirements, ST offers these devices in ECOPACK?

packages. These packages have a Lead-free second level interconnect . The category of

second level interconnect is marked on the package and on the inner box label, in

compliance with JEDEC Standard JESD97. The maximum ratings related to soldering

conditions are also marked on the inner box label. ECOPACK is an ST trademark.

ECOPACK specifications are available at: https://www.sodocs.net/doc/0f4376091.html,

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STP10NK80ZFP - STP10NK80Z - STW10NK80Z Package mechanical data

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Package mechanical data STP10NK80ZFP - STP10NK80Z - STW10NK80Z

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STP10NK80ZFP - STP10NK80Z - STW10NK80Z Package mechanical data

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Revision history STP10NK80ZFP - STP10NK80Z - STW10NK80Z

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5 Revision history

Table 9.

Document revision history

Date Revision

Changes

08-Sep-20054Complete document 10-Mar-20065Inserted ecopack indication 28-Sep-2005

New template, no content change

STP10NK80ZFP - STP10NK80Z - STW10NK80Z

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