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THS3091DDAR中文资料

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FEATURES DESCRIPTION

APPLICATIONS

TOTAL HARMONIC DISTORTION

TYPICAL ARBITARY WAVEFORM

GENERATOR OUTPUT DRIVE CIRCUIT

f ? Frequency ? Hz

THS3091

THS3095

SLOS423C–SEPTEMBER2003–REVISED AUGUST2004 HIGH-VOLTAGE,LOW-DISTORTION,CURRENT-FEEDBACK

OPERATIONAL AMPLIFIERS

?Low Distortion The THS3091and THS3095are high-voltage,

low-distortion,high-speed,current-feedback –77dBc HD2at10MHz,R L=1k?

amplifiers designed to operate over a wide supply –69dBc HD3at10MHz,R L=1k?

range of±5V to±15V for applications requiring ?Low Noise large,linear output signals such as Pin,Power FET,–14pA/√Hz Noninverting Current Noise and VDSL line drivers.

–17pA/√Hz Inverting Current Noise The THS3095features a power-down pin(PD)that

puts the amplifier in low power standby mode,and –2nV/√Hz Voltage Noise

lowers the quiescent current from9.5mA to500μA.?High Slew Rate:7300V/μs(G=5,V O=20V PP)

The wide supply range combined with total harmonic ?Wide Bandwidth:210MHz(G=2,R L=100?)

distortion as low as-69dBc at10MHz,in addition,to ?High Output Current Drive:±250mA

the high slew rate of7300V/μs makes the ?Wide Supply Range:±5V to±15V THS3091/5ideally suited for high-voltage arbitrary

waveform driver applications.Moreover,having the ?Power-Down Feature:(THS3095Only)

ability to handle large voltage swings driving into

high-resistance and high-capacitance loads while

maintaining good settling time performance makes ?High-Voltage Arbitrary Waveform

the devices ideal for Pin driver and PowerFET driver ?Power FET Driver applications.

?Pin Driver

The THS3091and THS3095are offered in an8-pin ?VDSL Line Driver SOIC(D),and the8-pin SOIC(DDA)packages with

PowerPAD?.

Please be aware that an important notice concerning availability,standard warranty,and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PowerPAD is a trademark of Texas Instruments.

UNLESS OTHERWISE NOTED this document contains PRO-Copyright?2003–2004,Texas Instruments Incorporated DUCTION DATA information current as of publication date.Prod-

ucts conform to specifications per the terms of Texas Instruments

standard warranty.Production processing does not necessarily

include testing of all parameters.

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Note A: The devices with the power?down option defaults to the ON state if no signal is applied to the PD pin. Additionallly, the REF

pin functional range is from V S? to (V S+ ? 4 V).

DISSIPATION RATING TABLE

THS3091

THS3095

SLOS423C–SEPTEMBER2003–REVISED AUGUST2004

These devices have limited built-in ESD protection.The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.

ODERING INFORMATION

PART NUMBER PACKAGE TYPE TRANSPORT MEDIA,QUANTITY

THS3091D Rails,75

SOIC-8

THS3091DR Tape and Reel,2500

THS3091DDA Rails,75

SOIC-8-PP(1)

THS3091DDAR Tape and Reel,2500

Power-down

THS3095D Rails,75

SOIC-8

THS3095DR Tape and Reel,2500

THS3095DDA Rails,75

SOIC-8-PP(1)

THS3095DDAR Tape and Reel,2500

(1)The PowerPAD is electrically isolated from all other pins.

POWER RATING(2)

T J=125°C PACKAGEΘJC(°C/W)ΘJA(°C/W)(1)

T A=25°C T A=85°C D-838.397.5 1.02W410mW DDA-8(3)9.245.8 2.18W873mW

(1)This data was taken using the JEDEC standard High-K test PCB.

(2)Power rating is determined with a junction temperature of125°C.This is the point where distortion starts to substantially increase.

Thermal management of the final PCB should strive to keep the junction temperature at or below125°C for best performance and long-term reliability.

(3)The THS3091and THS3095may incorporate a PowerPAD?on the underside of the chip.This acts as a heatsink and must be

connected to a thermally dissipating plane for proper power dissipation.Failure to do so may result in exceeding the maximum junction temperature which could permanently damage the device.See TI Technical Brief SLMA002for more information about utilizing the PowerPAD?thermally enhanced package.

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RECOMMENDED OPERATING CONDITIONS ABSOLUTE MAXIMUM RATINGS

THS3091

THS3095 SLOS423C–SEPTEMBER2003–REVISED AUGUST2004

MIN MAX UNIT

Dual supply±5±15 Supply voltage V Single supply1030

T A Operating free-air temperature-4085°C

over operating free-air temperature(unless otherwise noted)(1)

UNIT

V S-to V S+Supply voltage33V

V I Input voltage±V S

V ID Differential input voltage±4V

I O Output current350mA

Continuous power dissipation See Dissipation Ratings Table

T J Maximum junction temperature,150°C

T J(2)Maximum junction temperature,continuous operation,long-term reliability125°C

T stg Storage temperature-65°C to150°C Lead temperature1,6mm(1/16inch)from case for10seconds300°C

HBM2000 ESD ratings CDM1500

MM150

(1)The absolute maximum ratings under any condition is limited by the constraints of the silicon process.Stresses above these ratings may

cause permanent damage.Exposure to absolute maximum conditions for extended periods may degrade device reliability.These are stress ratings only,and functional operation of the device at these or any other conditions beyond those specified is not implied.

(2)The maximum junction temperature for continuous operation is limited by package constraints.Operation above this temperature may

result in reduced reliability and/or lifetime of the device.

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ELECTRICAL CHARACTERISTICS

THS3091THS3095

SLOS423C–SEPTEMBER 2003–REVISED AUGUST 2004

V S =±15V,R F =1.21k ?,R L =100?,and G =2(unless otherwise noted)

TYP

OVER TEMPERATURE PARAMETER

TEST CONDITIONS

0°C to -40°C to MIN/TYP/25°C

25°C

UNIT

70°C

85°C

MAX

AC PERFORMANCE

G =1,R F =1.78k ?,V O =200mV PP

235G =2,R F =1.21k ?,V O =200mV PP 210Small-signal bandwidth,-3dB

G =5,R F =1k ?,V O =200mV PP 190MHz

TYP

G =10,R F =866?,V O =200mV PP

1800.1-dB bandwidth flatness G =2,R F =1.21k ?,V O =200mV PP 95Large-signal bandwidth G =5,R F =1k ?,V O =4V PP

135G =2,V O =10-V step,R F =1.21k ?5000Slew rate (25%to 75%level)V/μs TYP G =5,V O =20-V step,R F =1k ?7300Rise and fall time G =2,V O =5-V PP ,R F =1.21k ?5ns TYP Settling time to 0.1%G =-2,V O =2V PP step 42ns

TYP

Settling time to 0.01%G =-2,V O =2V PP step

Harmonic distortion R L =100?662nd Harmonic distortion R L =1k ?77G =2,R F =1.21k ?,dBc

TYP

V O =2V PP ,f =10MHz

R L =100?743rd Harmonic distortion R L =1k ?

69Input voltage noise

f >10kHz 2nV /√Hz TYP Noninvertin

g input current noise f >10kHz 14pA /√Hz TYP Inverting input current noise f >10kHz

17pA /√Hz

TYP

NTSC 0.013%Differential gain PAL 0.011%G =2,R L =150?,TYP

R F =1.21k ?

NTSC 0.020°Differential phase PAL

0.026°

DC PERFORMANCE Transimpedance V O =±7.5V,Gain =1850350300300k ?MIN Input offset voltage

0.9344mV MAX V CM =0V Average offset voltage drift ±10±10μV/°C TYP Noninverting input bias current 4152020μA MAX V CM =0V Average bias current drift ±20±20nA/°C TYP Inverting input bias current 3.5152020μA MAX V CM =0V Average bias current drift ±20±20nA/°C TYP Input offset current

1.7

1515μA MAX V CM =0V

Average offset current drift ±20

±20

nA/°C

TYP

INPUT CHARACTERISTICS Common-mode input range ±13.6±13.3±13±13V MIN Common-mode rejection ratio V CM =±10V

7868

dB MIN Noninverting input resistance 1.3M ?TYP Noninverting input capacitance 0.1pF TYP Inverting input resistance 30?TYP Inverting input capacitance

1.4

TYP

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THS3091

THS3095 SLOS423C–SEPTEMBER2003–REVISED AUGUST2004 TYP OVER TEMPERATURE

PARAMETER TEST CONDITIONS0°C to-40°C to MIN/TYP/

25°C25°C UNIT

70°C85°C MAX OUTPUT CHARACTERISTICS

R L=1k?±13.2±12.8±12.5±12.5

Output voltage swing V MIN

R L=100?±12.5±12.1±11.8±11.8

Output current(sourcing)R L=40?280225200200mA MIN Output current(sinking)R L=40?250200175175mA MIN Output impedance f=1MHz,Closed loop0.06?TYP POWER SUPPLY

Specified operating voltage±15±16±16±16V MAX Maximum quiescent current9.510.51111mA MAX Minimum quiescent current9.58.588mA MIN Power supply rejection(+PSRR)V S+=15.5V to14.5V,V S-=15V75706565dB MIN Power supply rejection(-PSRR)V S+=15V,V S-=-15.5V to-14.5V73686565dB MIN POWER-DOWN CHARACTERISTICS(THS3095ONLY)

Enable,REF=0V≤

Power-down voltage level V MAX

Power-down,REF=0V≥2

Power-down quiescent current PD=0V500700800800μA MAX

V PD=0V,REF=0V,11152020

V PD quiescent currentμA MAX

V PD=3.3V,REF=0V11152020

Turnon time delay90%of final value60

μs TYP Turnoff time delay10%of final value150

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ELECTRICAL CHARACTERISTICS

THS3091THS3095

SLOS423C–SEPTEMBER 2003–REVISED AUGUST 2004

V S =±5V,R F =1.15k ?,R L =100?,and G =2(unless otherwise noted)

TYP

OVER TEMPERATURE PARAMETER

TEST CONDITIONS

0°C to -40°C to MIN/TYP/25°C

25°C

UNIT

70°C

85°C

MAX

AC PERFORMANCE

G =1,R F =1.78k ?,V O =200mV PP

190G =2,R F =1.15k ?,V O =200mV PP 180Small-signal bandwidth,-3dB

G =5,R F =1k ?,V O =200mV PP 160MHz

TYP

G =10,R F =866?,V O =200mV PP

1500.1-dB bandwidth flatness G =2,R F =1.15k ?,V O =200mV PP 65Large-signal bandwidth G =2,R F =1.15k ?,V O =4V PP 160G =2,V O =5-V step,R F =1.21k ?1400Slew rate (25%to 75%level)V/μs TYP G =5,V O =5-V step,R F =1k ?1900Rise and fall time G =2,V O =5-V step,R F =1.21k ?5ns TYP Settling time to 0.1%G =-2,V O =2V PP step 35ns

TYP

Settling time to 0.01%G =-2,V O =2V PP step

Harmonic distortion R L =100?772nd Harmonic distortion R L =1k ?73G =2,R F =1.15k ?,dBc

TYP

V O =2V PP ,f =10MHz

R L =100?703rd Harmonic distortion R L =1k ?

68Input voltage noise

f >10kHz 2nV /√Hz TYP Noninvertin

g input current noise f >10kHz 14pA /√Hz TYP Inverting input current noise f >10kHz

17pA /√Hz

TYP

NTSC 0.027%Differential gain PAL 0.025%G =2,R L =150?,TYP

R F =1.15k ?

NTSC 0.04°Differential phase PAL

0.05°

DC PERFORMANCE Transimpedance V O =±2.5V,Gain =1700250200200k ?MIN Input offset voltage

0.3233mV MAX V CM =0V Average offset voltage drift ±10±10μV/°C TYP Noninverting input bias current

2152020μA MAX V CM =0V Average bias current drift ±20±20nA/°C TYP Inverting input bias current

5152020μA MAX V CM =0V Average bias current drift ±20±20nA/°C TYP Input offset current

1515μA MAX V CM =0V

Average offset current drift ±20

±20

nA/°C

TYP

INPUT CHARACTERISTICS Common-mode input range ±3.6±3.3±3±3V MIN Common-mode rejection ratio V CM =±2.0V,V O =0V

6660

dB MIN Noninverting input resistance 1.1M ?TYP Noninverting input capacitance 1.2pF TYP Inverting input resistance 32?TYP Inverting input capacitance

1.5

TYP

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THS3091

THS3095 SLOS423C–SEPTEMBER2003–REVISED AUGUST2004 TYP OVER TEMPERATURE

PARAMETER TEST CONDITIONS0°C to-40°C to MIN/TYP/

25°C25°C UNIT

70°C85°C MAX OUTPUT CHARACTERISTICS

R L=1k?±3.4±3.1±2.8±2.8

Output voltage swing V MIN

R L=100?±3.1±2.7±2.5±2.5

Output current(sourcing)R L=40?200160140140mA MIN Output current(sinking)R L=40?180150125125mA MIN Output impedance f=1MHz,Closed loop0.09?TYP POWER SUPPLY

Specified operating voltage±5±4.5±4.5±4.5V MAX Maximum quiescent current8.299.59.5mA MAX Minimum quiescent current8.27 6.5 6.5mA MIN Power supply rejection(+PSRR)V S+=5.5V to4.5V,V S–=5V73686363dB MIN Power supply rejection(-PSRR)V S+=5V,V S–=–4.5V to-5.5V71656060dB MIN POWER-DOWN CHARACTERISTICS(THS3095ONLY)

Enable,REF=0V≤0.8

Power-down voltage level V MAX

Power-down,REF=0V≥2

Power-down quiescent current PD=0V300500600600μA MAX

V PD=0V,REF=0V,11152020

V PD quiescent currentμA MAX

V PD=3.3V,REF=0V11152020

Turnon time delay90%of final value60

μs TYP Turnoff time delay10%of final value150

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TYPICAL CHARACTERISTICS

TABLE OF GRAPHS

THS3091THS3095

SLOS423C–SEPTEMBER 2003–REVISED AUGUST 2004

±15-V GRAPHS

FIGURE Noninverting small-signal frequency response 1,2Inverting small-signal frequency response 30.1-dB gain flatness frequency response 4Noninverting large-signal frequency response 5Inverting large-signal frequency response 6Capacitive load frequency response 7Recommended R ISO vs Capacitive load 82nd Harmonic distortion vs Frequency 9,113rd Harmonic distortion vs Frequency 10,122nd Harmonic distortion vs Frequency 133rd Harmonic distortion vs Frequency

14Harmonic distortion vs Output voltage swing 15,16Slew rate vs Output voltage step 17,18,19

Noise vs Frequency

20Settling time 21,22Quiescent current vs Supply voltage 23Quiescent current vs Frequency 24Output voltage

vs Load resistance 25Input bias and offset current vs Case temperature 26Input offset voltage vs Case temperature 27Transimpedance vs Frequency 28Rejection ratio

vs Frequency 29Noninverting small-signal transient response 30Inverting large-signal transient response 31,32Overdrive recovery time 33Differential gain vs Number of loads 34Differential phase

vs Number of loads 35Closed-loop output impedance vs Frequency 36Power-down quiescent current vs Supply voltage 37Turnon and turnoff time delay

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TABLE OF GRAPHS

THS3091

THS3095 SLOS423C–SEPTEMBER2003–REVISED AUGUST2004

±5-V GRAPHS FIGURE Noninverting small-signal frequency response39 Inverting small-signal frequency response40

0.1-dB gain flatness frequency response41 Noninverting large-signal frequency response42 Inverting large-signal frequency response43 Settling time44

2nd Harmonic distortion vs Frequency45,47

3rd Harmonic distortion vs Frequency46,48 Harmonic distortion vs Output voltage swing49,50

Slew rate vs Output voltage step51,52,53 Quiescent current vs Frequency54

Output voltage vs Load resistance55

Input bias and offset current vs Case temperature56 Overdrive recovery time57 Rejection ratio vs Frequency58

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TYPICAL CHARACTERISTICS (±15V)

1 M

10 M

100 M

1 G

f ? Frequency ? Hz N o n i n v e r t i n

g G a i n ? d B

1 M

10 M

100 M

1 G

f ? Frequency ? Hz N o n i n v e r t i n

g G a i n ? d B

1 M

10 M

100 M

1 G

f ? Frequency ? Hz

I n v e r t i n g G a i n ? d B

f ? Frequency ? Hz

I n v e r t i n g G a i n ? d

246810121416 f ? Frequency ? Hz

N o n i n v e r t i n g G a i n ? d B

5.75.85.96

6.16.26.3

f - Frequency - Hz

N o n i n v e r t i n g G a i n - d B

246810121416S i g n a l G a i n ? d B

f ? Frequency ? Hz

1015202530354045

C L ? Capacitive Load ? pF

R e c o m m e n d e d R

I S O

? f ? Frequency ? Hz

2n d H a r m o n i c D i s t o r t i o n ? d B c

THS3091THS3095

SLOS423C–SEPTEMBER 2003–REVISED AUGUST 2004

NONINVERTING SMALL-SIGNAL

INVERTING SMALL-SIGNAL FREQUENCY RESPONSE

FREQUENCY RESPONSE

Figure 1.

Figure 2.

Figure 3.

0.1-dB GAIN FLATNESS NONINVERTING LARGE-SIGNAL

INVERTING LARGE-SIGNAL FREQUENCY RESPONSE

FREQUENCY RESPONSE

Figure 4.Figure 5.

Figure 6.

RECOMMENDED R ISO

2ND HARMONIC DISTORTION

CAPACITIVE LOAD vs

FREQUENCY RESPONSE

CAPTIVATE LOAD

FREQUENCY

Figure 7.Figure 8.Figure 9.

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f ? Frequency ? Hz 2n d H a r m o n i c D i s t o r t i o n ? d B c

?90

?80?70?60?50?40

f ? Frequency ? Hz

3r d H a r m o n i c D i s t o r t i o n ? d B c

?55?85

?75?65?45

-90-80

-70-60-50-40

1 M

10 M

100 M

f - Frequency - Hz

100 k

3r d H a r m o n i c D i s t o r t i o n - d B

f ? Frequency ? Hz

2n d H a r m o n i c D i s t o r t i o n ? d B c

f ? Frequency ? Hz

3r d H a r m o n i c D i s t o r t i o n ? d B c

1012H a r m o n i c D i s t o r t i o n - d B c

V O - Output Voltage Swing - V PP

1416

1820

0.5

1 1.5

2 2.5

3 3.5

4 4.55

V O ? Output Voltage ? V PP

S R ? S l e w R a t e ? s

μV /

12H a r m o n i c D i s t o r t i o n - d B c

V O - Output Voltage Swing - V PP

161820

1000

20003000400050006000

V O - Output Voltage - V PP

S R - S l e w R a t e - s

μV /THS3091THS3095

SLOS423C–SEPTEMBER 2003–REVISED AUGUST 2004

TYPICAL CHARACTERISTICS (±15V)(continued)

3RD HARMONIC DISTORTION

2ND HARMONIC DISTORTION

3RD HARMONIC DISTORTION

FREQUENCY

Figure 10.

Figure 11.

Figure 12.

2ND HARMONIC DISTORTION

3RD HARMONIC DISTORTION

HARMONIC DISTORTION

FREQUENCY

OUTPUT VOLTAGE SWING

Figure 13.

Figure 14.

Figure 15.

HARMONIC DISTORTION

SLEW RATE

OUTPUT VOLTAGE SWING

OUTPUT VOLTAGE STEP

Figure 16.Figure 17.Figure 18.

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100

100010100 1 k 10 k 100 k

f ? Frequency ? Hz

? C u r r e n t N o i s e ?V n I n ? V o l t a g e N o i s e ? p A /H z

n V /

H z

-1.25

-1

-0.75-0.5-0.250

t - Time - ns

- O u t p u t V o l t a g e - V

V O

01000

2000300040005000

600070008000

V O - Output Voltage - V PP

S R - S l e w R a t e - s

μV /

-4.5

-4-3.5-3-2.5-2-1.5-1-0.500.511.522.533.544.5t - Time - ns

- O u t p u t V o l t a g e - V

V O

66.5

77.588.599.5

10? Q u i e s c e n t C u r r e n t ? m A

I Q V S ? Supply Voltage ? ±V

1 M

10 M ? Q u i e s c e n t C u r r e n t ? m A

I Q f ? Frequency ? Hz

-16

-12-8-40481216R L - Load Resistance - ?

- O u t p u t V o l t a g e -

V O 0

0.5

11.5

22.53

T C - Case Temperature - °C

- I n p u t O f f s e t V o l t a g e - m V

V O S

0.51

1.52

2.53

3.54

4.55

5.56

6.57

T C - Case Temperature - °C

- I n p u t B i a s C u r r e n t s -I I B I O S - I n p u t O f f s e t C u r r e n t s -A μA

μTHS3091THS3095

SLOS423C–SEPTEMBER 2003–REVISED AUGUST 2004

TYPICAL CHARACTERISTICS (±15V)(continued)

SLEW RATE

NOISE vs

OUTPUT VOLTAGE STEP

FREQUENCY

SETTLING TIME

Figure 19.Figure 20.

Figure 21.

QUIESCENT CURRENT

SETTLING TIME

SUPPLY VOLTAGE

FREQUENCY

Figure 22.Figure 23.

Figure 24.

INPUT BIAS AND OUTPUT VOLTAGE

OFFSET CURRENT

INPUT OFFSET VOLTAGE

LOAD RESISTANCE

CASE TEMPERATURE

Figure 25.Figure 26.Figure 27.

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-0.3

-0.25

-0.2-0.15-0.1-0.05

010203040506070

t - Time - n s

- O u t p u t V o l t a g e - V

V O 0

1020304050

R e j e c t i o n R a t i o ? d B

f ? Frequency ? Hz

100 k

1 M

10 M

100 M

1 G

f ? Frequency ? Hz

T r a n s i m p e d a n c e G a i n ? d B O h m s

00.10.20.30.40.50.60.70.80.9

1t ? Time ? μs

? O u t p u t V o l t a g e ? V

? I n p u t V o l t a g e ? V

V I V O

-12

-10-8-6-4-2t - Time - n s

- O u t p u t V o l t a g e

- V

V O t ? Time ? n s

? O u t p u t V o l t a g e ? V

V O

00.010.020.030.040.050.060.070.080.090.100

678

Number of Loads - 150 ?

D i f f e r e n t i a l G a i n - %

0.01

0.02

0.03

0.04

0.05

Number of Loads ? 150 ?

D i f f e r e n t i a l P h a s e ?

1 M

10 M

100 M

1 G

f ? Frequency ? Hz

C l o s e d -L o o p O u t p u t I m p e d a n c e ??

THS3091THS3095

SLOS423C–SEPTEMBER 2003–REVISED AUGUST 2004

TYPICAL CHARACTERISTICS (±15V)(continued)

TRANSIMPEDANCE

REJECTION RATIO

NONINVERTING SMALL-SIGNAL

FREQUENCY

TRANSIENT RESPONSE

Figure 28.

Figure 29.

Figure 30.

INVERTING LARGE-SIGNAL INVERTING LARGE-SIGNAL TRANSIENT RESPONSE

TRANSIENT RESPONSE

OVERDRIVE RECOVERY TIME

Figure 31.Figure 32.Figure 33.

CLOSED-LOOP OUTPUT

DIFFERENTIAL GAIN

DIFFERENTIAL PHASE

IMPEDANCE

NUMBER OF LOADS

FREQUENCY

Figure 34.Figure 35.Figure 36.

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?0.1

00.10.20.3

t ? Time ? ms

? O u t p u t V o l t a g e L e v e l ? V

V O P o w e r D o w n P u l s e ? V

V S - Supply Voltage - ±V

P o w e r d o w n Q u i e s c e n t C u r r e n t -A

μTHS3091THS3095

SLOS423C–SEPTEMBER 2003–REVISED AUGUST 2004

TYPICAL CHARACTERISTICS (±15V)(continued)

POWER-DOWN QUIESCENT

CURRENT

TURNON AND TURNOFF

SUPPLY VOLTAGE

TIME DELAY

Figure 37.Figure 38.

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TYPICAL CHARACTERISTICS (±5V)

0246810121416182022241 M

10 M 100 M 1 G

f ? Frequency ? Hz

I n v e r t i n g G a i n ? d

-4

-2024681012141618202224 1 M

10 M

100 M

1 G

f - Frequency - Hz

N o n i n v e r t i n g G a i n - d B

5.7

5.8

5.96

6.1

6.2

6.3

1 M

10 M

100 M

f - Frequency - Hz

N o n i n v e r t i n g G a i n - d

-1.25

-1-0.75-0.5

-0.250

678910

t - Time - ns

- O u t p u t V o l t a g e - V

V O

02468

101214161 M

10 M

100 M

1 G

f ? Frequency ? Hz N o n i n v e r t i n

g G a i n ? d B

?2024681012

14161 M

10 M

100 M 1 G

f ? Frequency ? Hz

I n v e r t i n g G a i n ? d

f ? Frequency ? Hz 2n d H a r m o n i c D i s t o r t i o n ? d B c

-90-80-70-60-50-40

f - Frequency - Hz 3r d H a r m o n i c D i s t o r t i o n - d B c

f ? Frequency ? Hz

2n d H a r m o n i c D i s t o r t i o n ? d B c

THS3091THS3095

SLOS423C–SEPTEMBER 2003–REVISED AUGUST 2004

NONINVERTING SMALL-SIGNAL

INVERTING SMALL-SIGNAL 0.1-dB GAIN FLATNESS FREQUENCY RESPONSE

FREQUENCY RESPONSE

Figure 39.

Figure 40.

Figure 41.

NONINVERTING LARGE-SIGNAL

INVERTING LARGE-SIGNAL FREQUENCY RESPONSE

FREQUENCY RESPONSE

SETTLING TIME

Figure 42.

Figure 43.

Figure 44.

2ND HARMONIC DISTORTION

3RD HARMONIC DISTORTION

2ND HARMONIC DISTORTION

FREQUENCY

Figure 45.Figure 46.Figure 47.

https://www.sodocs.net/doc/044433011.html,

f ? Frequency ? Hz

3r d H a r m o n i c D i s t o r t i o n ? d B c

H a r m o n i c D i s t o r t i o n - d B

V O - Output Voltage Swing - V PP

123456

H a r m o n i c D i s t o r t i o n ? d B c

V O ? Output Voltage Swing ? V PP

020040060080010001200140016000

12345

S R ? S l e w R a t e ? V /V O ? Output Voltage ?V PP

2004006008001000

120014001600S R ? S l e w R a t e ? V /V O ? Output Voltage ?V PP

0200

4006008001000120014001600180020000

0.51 1.52 2.53 3.54 4.55

S R - S l e w R a t e - V /V O - Output Voltage -V PP

-40-30-20-100

102030405060708090- I n p u t B i a s C u r r e n t -T C - Case Temperature - °C

- I n p u t O f f s e t C u r r e n t -I I B A

μI O S A

246810121416182022? Q u i e s c e n t C u r r e n t ? m A

I Q f ? Frequency ? Hz

-3.5

-3-2.5-2-1.5-1-0.500.511.522.533.510

100

1000

R L - Load Resistance - ?

- O u t p u t V o l t a g e - V

V O THS3091THS3095

SLOS423C–SEPTEMBER 2003–REVISED AUGUST 2004

TYPICAL CHARACTERISTICS (±5V)(continued)

3RD HARMONIC DISTORTION

HARMONIC DISTORTION

FREQUENCY

OUTPUT VOLTAGE SWING

Figure 48.

Figure 49.

Figure 50.

SLEW RATE

OUTPUT VOLTAGE STEP

Figure 51.Figure 52.Figure 53.

INPUT BIAS AND QUIESCENT CURRENT

OUTPUT VOLTAGE

OFFSET CURRENT

FREQUENCY

LOAD RESISTANCE

CASE TEMPERATURE

Figure 54.Figure 55.Figure 56.

https://www.sodocs.net/doc/044433011.html,

-5

-4-3-2-1012345

t - Time - μs

- I n p u t V o l t a g e - V

V I - O u t p u t V o l t a g e - A

V O 0

10203040506070

100 k

1 M 10 M 100 M

R e j e c t i o n R a t i o - d B

f - Frequency - Hz

THS3091THS3095

SLOS423C–SEPTEMBER 2003–REVISED AUGUST 2004

TYPICAL CHARACTERISTICS (±5V)(continued)

REJECTION RATIO

OVERDRIVE RECOVERY

TIME

FREQUENCY

Figure 57.Figure 58.

https://www.sodocs.net/doc/044433011.html,

APPLICATION INFORMATION

WIDEBAND,NONINVERTING OPERATION

?15 V

V I

THS3091THS3095

SLOS423C–SEPTEMBER 2003–REVISED AUGUST 2004

Current-feedback amplifiers are highly dependent on the feedback resistor R F for maximum performance The THS3091/5are unity gain stable 235-MHz and stability.Table 1shows the optimal gain-setting current-feedback operational amplifiers,designed to resistors R F and R G at different gains to give operate from a ±5-V to ±15-V power supply.

maximum bandwidth with minimal peaking in the Figure 59shows the THS3091in a noninverting gain frequency response.Higher bandwidths can be of 2-V/V configuration typically used to generate the achieved,at the expense of added peaking in the performance curves.Most of the curves were frequency response,by using even lower values for characterized using signal sources with 50-?source R F .Conversely,increasing R F decreases the impedance,and with measurement equipment bandwidth,but stability is improved.

presenting a 50-?load impedance.

Table 1.Recommended Resistor Values for

Optimum Frequency Response

THS3091and THS3095R F and R G values for minimal peaking

with R L =100?SUPPLY VOLTAGE

GAIN (V/V)

R G (?)R F (?)(V)

±15– 1.78k 1

±5– 1.78k ±15 1.21k 1.21k 2

±5 1.15k 1.15k ±152491k 5±52491k ±1595.386610±595.3866–1±15and ±5 1.05k 1.05k Figure 59.Wideband,Noninverting Gain

–2±15and ±54991k Configuration

–5±15and ±5182909–10

±15and ±5

86.6

866

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WIDEBAND,INVERTING OPERATION

S 2

Video Distribution

SINGLE-SUPPLY OPERATION

THS3091THS3095

SLOS423C–SEPTEMBER 2003–REVISED AUGUST 2004

Figure 60shows the THS3091in a typical inverting gain configuration where the input and output impedances and signal gain from Figure 59are retained in an inverting circuit configuration.

Figure 61.DC-Coupled,Single-Supply Operation Figure 60.Wideband,Inverting Gain

Configuration

The wide bandwidth,high slew rate,and high output drive current of the THS3091/5matches the demands The THS3091/5have the capability to operate from a for video distribution for delivering video signals down single-supply voltage ranging from 10V to 30V.multiple cables.To ensure high signal quality with When operating from a single power supply,biasing minimal degradation of performance,a 0.1-dB gain the input and output at mid-supply allows for the flatness should be at least 7x the passband maximum output voltage swing.The circuits shown in frequency to minimize group delay variations from the Figure 61show inverting and noninverting amplifiers amplifier.A high slew rate minimizes distortion of the configured for single-supply operations.

video signal,and supports component video and RGB video signals that require fast transition times and fast settling times for high signal quality.

Figure 62.Video Distribution Amplifier

Application

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Driving Capacitive Loads

051015202530354045

C L ? Capacitive Load ? pF

R e c o m m e n d e d R

I S O

THS3091THS3095

SLOS423C–SEPTEMBER 2003–REVISED AUGUST 2004

Placing a small series resistor,R ISO ,between the amplifier’s output and the capacitive load,as shown Applications such as FET line drivers can be highly in Figure 64,is an easy way of isolating the load capacitive and cause stability problems for capacitance.

high-speed amplifiers.

Using a ferrite chip in place of R ISO ,as shown in Figure 63through Figure 68show recommended Figure 65,is another approach of isolating the output methods for driving capacitive loads.The basic idea of the amplifier.The ferrite's impedance characteristic is to use a resistor or ferrite chip to isolate the phase versus frequency is useful to maintain the shift at high frequency caused by the capacitive load low-frequency load independence of the amplifier from the amplifier’s feedback path.See Figure 63for while isolating the phase shift caused by the capaci-recommended resistor values versus capacitive load.

tance at high https://www.sodocs.net/doc/044433011.html,e a ferrite with similar impedance to R ISO ,20?-50?,at 100MHz and low impedance at dc.

Figure 66shows another method used to maintain the low-frequency load independence of the amplifier while isolating the phase shift caused by the capaci-tance at high frequency.At low frequency,feedback is mainly from the load side of R ISO .At high fre-quency,the feedback is mainly via the 27-pF capacitor.The resistor R IN in series with the negative input is used to stabilize the amplifier and should be equal to the recommended value of R F at unity gain.Replacing R IN with a ferrite of similar impedance at about 100MHz as shown in Figure 67gives similar results with reduced dc offset and low-frequency Figure 63.Recommended R ISO vs Capacitive Load

noise.(See the ADDITIONAL REFERENCE MA-TERIAL section for expanding the usability of cur-rent-feedback amplifiers.)

Figure 64.

Figure 66.

Figure 65.

THS3091DDAR中文资料

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