搜档网
当前位置:搜档网 › 电子信息工程 微处理器[外文翻译]

电子信息工程 微处理器[外文翻译]

电子信息工程 微处理器[外文翻译]
电子信息工程 微处理器[外文翻译]

外文资料

所译外文资料:

1.作者G..Bouwhuis, J.Braat, A.Huijser

2.书名:Principles of Optical Disk Systems

3.出版时间:1991年9月

4.所译章节:Session 2/Chapter9, Session 2/Chapter 11

原文:

Microprocessor

One of the key inventions in the history of electronics, and in fact one of the most important inventions ever period, was the transistor. As time progressed after the invention of LSI integrated circuits, the technology improved and chips became smaller, faster and cheaper. The functions performed by a processor were implemented using several different logic chips. Intel was the first company to incorporate all of these logic components into a single chip, this was the first microprocessor. A microprocessor is a complete computation engine that is fabricated on a single chip. A microprocessor executes a collection of machine instructions that tell the processor what to do. Based on the instructions, a microprocessor does three basic things: https://www.sodocs.net/doc/a211182324.html,ing the ALU (Arithmetic/Logic Unit), a microprocessor can perform mathematical operations like addition, subtraction, multiplication and division; 2.A microprocessor can move data from one memory location to another; 3.A microprocessor can make decisions and jump to a new set of instructions based on those decisions.

There may be very sophisticated things that a microprocessor does, but those are its three basic activities. Microprocessor has an address bus that sends an address to memory, a data bus that can send data to memory or receive data from memory, an RD(read) and WR(write) line that lets a clock pulse sequence the processor and a reset line that resets the program counter to zero(or whatever) and restarts execution. And let’s assume that both the address and data buses are 8 bits wide here.

Here are the components of this simple microprocessor:

1. Registers A, B and C are simply latches made out of flip-flops.

2. The address latch is just like registers A, B and C.

3. The program counter is a latch with the extra ability to increment by 1 when

told to do so, and also to reset to zero when told to do so.

4. The ALU could be as simple as an 8-bit adder, or it might be able to add,

subtract, multiply and divide 8-bit values. Let’s assume the latter here.

5. The test register is a special latch that can hold values from comparisons

performed in the ALU. An ALU can normally compare two numbers send determine if they are equal, if one is greater than the other, etc. The test register can also normally hold a carry bit from the last stage of the adder. It stores these values in flip-flops and then the instruction decoder can use the values to make decisions.

6. There are six boxes marked “3-State”.These are tri-state buffers. A tri-state

buffer can pass a 1, a 0 or it can essentially disconnect its output. A tri-state buffer allows multiple outputs to connect to a wire, but only one of then to actually drive a 1or a 0 onto the line.

7. The instruction register and instruction decoder are responsible for controlling

all of the other components.

Although they are not shown in this diagram, there would be control lines from the instruction decoder that would:

1. Tell the A register to latch the value currently on the data bus

2. Tell the B register to latch the value currently on the data bus

3. Tell the C register to latch the value currently on the data bus

4. Tell the program counter register to latch the value currently on the data bus

5. Tell the address register to latch the value currently on the data bus

6. Tell the instruction register to latch the value currently on the data bus

7. Tell the program counter to increment

8. Tell the program counter to reset to zero

9. Activate any of the six tri-state buffers (six separate lines)

10. Tell the ALU what operation to perform

11. Tell the test register to latch the ALU’s test bits

12. Activate the RD line

13. Activate the WR line

Coming into the instruction decoder are the bits from the best register and clock line, as well as the bits from the instruction register.

RAM and ROM The address and data buses, as well as the RD and WR lines connect either to RAM or ROM—generally both. In our sample microprocessor, we have an address bus 8 bits wide and a data bus 8 bits wide. That means that the microprocessor an address (2n) 256 bytes of the memory and it can read or write 8 bits of the memory at a time. Let’s assume that this simple microprocessor has 128 bytes of ROM starting at address 0 and 128 bytes of RAM starting at address 128.

ROM stands for read-only memory. A ROM chip is programmed with a permanent collection of pre-set bytes. The address bus tells the ROM chip which byte to get and place on the data bus. When the RD line changes state, the ROM chip presents the selected byte onto the data bus.

RAM stands for random-access memory. RAM contains bytes of information, and the microprocessor can read or write to those bytes depending on whether the RD or WR line is signaled. One problem with today’s RAM chips is that they forget everything once the power goes off. That is why the computer needs ROM.

By the way, nearly all computers contain some amount of ROM (it is possible to create a simple computer that contains no RAM—many microcontrollers do this by placing a handful of RAM bytes on the processor chip itself—but generally impossible to create one that contains no ROM).

On a PC, the ROM is called the BIOS (Basic Input/Output System). When the microprocessor starts, it begins executing instructions it finds in the BIOS. The BIOS instructions do things like test the hardware in the machine, and then it goes to the hard disk to fetch the boot sector. This boot sector is another small program, and the BIOS store it in RAM after reading it off the disk. The microprocessor then begins executing the boot sector’s instructions from RAM. The boot sector program will tell the microprocessor to fetch something else from the hard disk into RAM, which the microprocessor then executes, and so on. This is how the microprocessor loads and executes entire operating system.

Microprocessor Instructions Even the incredibly simple microprocessor shown here will have a fairly large set of instructions that it can perform. The collection of instructions is implemented as bit patterns, each one of which has a different meaning when loaded into the instruction register. Humans are not particularly good at remembering bit patterns, so a set of short words are defined to represent the different bit patterns. This collection of words is called the assembly languages of the processor. An assembler can translate the words into their bit patterns very easily, and then the output of assembler is placed in memory for the microprocessor to execute. If you use C language programming, a C compiler will translate the C code into assembly language.

So now the question is, “How do all of these instructions look in ROM?” Each of these assembly language instructions must be represented by a binary number. These numbers all know as recodes. The instruction decoder needs to turn each of recodes into a set of signals that drive the different components inside the microprocessor. Let’s take the ADD instruction as an example and look at what it needs to do.

During the first clock cycle, we need to actually load the instruction. Therefore the instruction decoder needs to: activate the tri-state buffer for the program counter; activate the RD line; activate the data-in tri-state buffer; latch the instruction into the instruction register.

During the second clock cycle, the ADD instruction is decoded. It needs to do very little: set the operation of ALU to addition; latch the output of the ALU into the C register.

During the third clock cycle, the program counter is incremented (in theory this could be overlapped into the second clock cycle).

Every instruction can be broken down as a set of sequenced operations like these that manipulate the components of microprocessor in the proper order. Some instructions, like this ADD instruction, might take two or three clock cycles. Others might take five or six clock cycles.

Microprocessor Performance The number of transistors available has a huge effect on the performance of a processor. As seen earlier, a typical instruction in a processor like an 8088 took 15 clock cycles to execute. Because of the design of the multiplier, it took approximately 80 cycles just to do one 16-bit multiplication on the 8088. With more transistors, much more powerful multipliers capable of single-cycle speeds become possible.

More transistors also allow for a technology called pipelining. In a pipelined architecture, instruction execution overlaps. So even though it might take five clock cycles to execute each instruction, there can be five instructions in various stages of execution simultaneously. That way it looks like one instruction completes every clock cycle.

Many modern processors have multiple instruction decoders, each with own pipeline. This allows for multiple instruction streams, which means that more than one instruction can complete during each clock cycle. This technique can be quite complex to implement, so it can be lots of transistors.

The trend in processor design has been toward full 32-bit ALU with fast floating point processors built in and pipelined execution with multiple instruction streams. There has also been a tendency toward special instructions that make certain operations particularly efficient. There has also been the addition of hardware virtual memory support and L1 caching on the processor chip. All of these trends push up the transistor count, leading to the multi-million transistor powerhouses available today. These processors can execute about one billion instructions per second!

The Operational Amplifier will continue to be a vital component of analog design

because it is a fundamental component. Each generation of electronic equipment integrates more functions on silicon and takes more of the analog circuitry inside the IC. As digital applications increase, analog applications also increase because the predominant supply of data and interface applications are in the real world, and the real world is an analog world.

The LM386 is a power amplifier designed for use in low voltage consumer applications. The gain is internally set to 20 to keep external part count low, but the addition of an external resistor and capacitor between pins 1 and 8 will increase the gain to any value from 20 to 200.The inputs are ground referenced while the output automatically biases to one-half the supply voltage. The quiescent power drain is only 24 mill watts when operating from a 6 volt supply, making the LM386 ideal for battery operation.

A Crystal is a basic piezoelectric quartz crystal. On its own, it cannot generate electrical clocks. It has to be connected to a clock oscillator to get a clock waveform. There are two kinds of crystals: Series Resonant, which can be modeled as a high Q series LC circuit, and Parallel Resonant, which can be modeled as a high Q parallel LC circuit. A Crystal Oscillator is an oscillator with the crystal as the feedback element. There are other kinds of oscillators with active or passive feedback components, but the crystal oscillator provides the most accurate and stable output frequency. Crystal oscillators are the preferred clock source in most high-speed digital systems requiring clocks. A chip is a small piece of conducting material on which an integrated circuit is embedded. A microprocessor is a silicon chip that contains a CPU. In operation, a computer is both hardware and software. One is useless without another. The hardware design specifies the commands it can follow, and the instructions tell it what to do. With the infiltration in the social field of the computer in recent years, the application of the one-chip computer is moving towards deepening constantly, drive tradition is it measure crescent benefit to upgrade day to control at the same time. In measuring in real time and automatically controlled one-chip computer application system, the one-chip computer often uses as a key part, only one-chip computer respect knowledge is not enough, should also follow the structure of the concrete hardware , and direct against and use the software of target's characteristic to combine concretely, in order to do perfectly.

译文:

微处理器

晶体管是电子学发展史上的关键发明之一,它实际上也是人类历史上最重要的发明之一。集成技术随着时间的推移而提高,芯片也更小,更快,更便宜。处理器完成的功能最早是由几个不同的逻辑芯片实现的,英特尔公司率先将所有这些部件集成到单个芯片中,这就是最早的微处理器,它是在单芯片上制造的完整的运算引擎。

微处理器执行一组机器指令,这些指令告诉微处理器去做什么,根据这些指令,微处理器能够完成如下三项基本任务。1.微处理器使用其ALU(算术/逻辑单元)可以完成加、减、乘、除等数学运算。2.微处理器可将数据从存储器的一个位置搬移到另一个位置。3.微处理器可做出判断,并根据这些判断跳转到一组新的指令。

一个微处理器可以做非常复杂的工作,但上述三项是最基本的。微处理器有一套地址总线(向存储器发送地址),一套数据总线(向存储器发送数据或者接收存储器数据),一条读信号线RD和一条写信号线WR(用于通知存储器是从寻址地址读取数据还是写入数据),一条时钟信号线(为处理器安排时序的时钟脉冲)和一条复位信号线(将程序计数器置零和重新开始执行)。这里假定数据总线和地址总线的宽度都是8位。

构成这个简易处理器的组件如下:

1.寄存器A,寄存器B和寄存器C:它们是由触发器构成的简易锁存器。

2.地址锁存器:和寄存器A,B,C一样。

3.程序计数器:一种具备“加一”功能和“置零”功能的锁存器。

4.算术逻辑单元:可以简单到只是一个8位加法器,也可以是能够完成8位加、减、乘、除的单元(此处我们假定为后者)。

5.测试寄存器:一种保存ALU比较结果的专用锁存器。通常,ALU能够将两个数进行比较,并判断出二者是否相等或者一个比另一个更大。测试寄存器也可以保存加法运算最后一步的进位。这些数值保存在触发器当中,指令译码器利用这些数值做出判决。

6.“3-State”是三态缓冲器。它可以传送逻辑1,逻辑0,或者和输出断开。三态缓冲器允许在一条信号线上连接多个输出信号,但只有一个信号输出。

7.指令寄存器和指令译码器负责控制所有其他组件。

从指令译码器引出完成如下功能的控制信号线:

1.通知寄存器A锁定当下出现在数据总线上的数值

2.通知寄存器B锁定当下出现在数据总线上的数值。

3.通知寄存器C锁定当下出现在数据总线上的数值

4.通知程序计数器锁定当下出现在数据总线上的数值

5.通知地址寄存器锁定当下出现在数据总线上的数值

6.通知指令寄存器锁定当下出现在数据总线上的数值

7.通知程序计数器增加

8.通知程序计数器复位置零

9.激活任何一个三态缓冲器

10.通知ALU需要完成的操作

11.通知测试寄存器锁定ALU的测试位

12.激活RD信号线

13.激活WR信号线

指令译码器的数据位不仅来自指令寄存器,而且来自测试寄存器和时钟信号线。

只读存储器和随机存取存储器数据总线、地址总线、读写信号线都连接到ROM 上或者连接到RAM上(通常两者都有)。在这个微处理器例子中,有一套8位地址总线和一套8位数据总线。这意味着微处理器可寻址256字节的存储器,一次可以读/写8位数据。假定该微处理器有128字节(地址从0开始)的RAM和128字节(地址从128开始)的RAM。

ROM是只读存储器。ROM芯片是用一组永久的预设字节进行编程得到的。地址总线告知ROM芯片要将哪个字节取出并置于数据总线上。当RD信号线改变状态时,ROM 芯片将选中的字节输出到数据总线上。

ROM是随机存取存储器。ROM中包含着以字节为单位的信息,微处理器能够依据RD/WR信号哪个有效来决定字节的读/写。当前RAM芯片的一个问题是:掉电后,所有保存在RAM上的内容全部丢失。这就是计算机需要ROM的原因。

顺便提一下,几乎所有计算机都有一定数量的ROM(可以建造一种简单的不含RAM的计算机——许多微控制器在片内集成了一定数量的RAM——但是一般不可能建造出一种不含ROM的计算机)。在PC机中,ROM被称作BIOS基本输入/输出系统)。当计算机启动时,它就执行在BIOS中找到的指令。这些BIOS指令完成对机内硬件的测试,然后从硬盘中读取引导扇区。引导扇区也是一个小程序,BIOS将其从硬盘中读出来之后,这个小程序就存储在RAM中。然后,微处理器开始从RAM执行引导扇区的指令。这个程序将告知微处理器从硬盘其他位置读取信息到RAM中,然后微处理器执行相应的指令等。这就是微处理器装载和执行整个操作系统的过程。

微处理器指令甚至这里给出的简单得难以置信的微处理器也拥有一套相当大的指令集。指令的集合是以比特组合的方式实现的;每一条指令在装载到指令寄存器的时候,都有不同的涵义。人类不善于记忆比特组合,因此定义了一组短字来代表不同的比特组合。这些短字的集合就称为处理器汇编语言。汇编器可以很容易地将这些短字翻译成与其对应的比特组合,汇编器的输出被放置到存储器中以便微处理器执行。假如使用C语言进行编程,那么编译器会将C代码翻译为汇编语言。

微处理器性能可用晶体管数量对于微处理器性能有很大的影响。正如先前看到的那样,像8088这样的处理器执行一条典型指令需要15个时钟周期。由于要设计乘法

器,在8088上完成一次16位乘法需要约80个时钟周期。晶体管越多,具备单周期乘法能力的乘法器就会越多。

更多的晶体管允许使用流水线技术。在流水线结构中,指令的执行是重叠的。这样的话,尽管执行每条指令可能需要5个周期,却可以在不同阶段同时执行5条指令。这样看上去好像每个周期都能完成一条指令。

许多现代处理器有多个指令译码器,而每个指令译码器都有各自的流水线。这样,就可以实现多指令流——即在一个周期内可以完成多条指令。该技术实现起来相当复杂,所以使用大量的晶体管。

处理器设计的趋势已经是全32位ALU、内置快速浮点处理器和多指令流水线。还有一个趋势是采用能使特定操作高效执行的特殊指令。此外,还有一种趋势是在处理器芯片附加上硬件虚拟存储器和L1高速缓存。所有这些趋势都需要增加晶体管,这导致了今天集成度高达几百万晶体管芯片的出现。这些处理器在1秒内可以执行约10亿条指令。

运放是一种基础的部件,它将作为模拟设计达到的关键部件,每一代电子设备在硅片上集成了更多的功能,将更多的模拟电路置于集成电路内部,随着数字应用的增加,模拟应用也会增加,因为大量的数据应用和接口应用都在现实世界中,而现实世界是一个模拟的世界。

晶体是一种基本的压电石英晶体,它本身是不能产生时钟信号的,必须和时钟振荡器连接在一起才能得到时钟波形。晶体有两种:串联谐振晶体(可视做高品质因数的串联LC电路)和并联谐振晶体(可视做高品质因数的并联LC电路)。晶体振荡器是一种用晶体做反馈元件的振荡器。而其他类型的振荡器采用有源,无源元件作为反馈元件,但晶体振荡器的输出频率最为精确和稳定。晶体振荡器是多数高速数字系统时钟源的首先。

LM386是美国国家半导体公司生产的音频功率放大器,主要应用于低电压消费类产品。为使外围元件最少,电压增益内置为20。但在1脚和8脚之间增加一只外接电阻和电容,便可将电压增益调为任意值,直至200。输入端以地为参考,同时输出端被自动偏置到电源电压的一半,在6V电源电压下,它的静态功耗仅为24mW,使得LM386特别适用于电池供电的场合。

芯片是嵌入了集成电路的一小片半导体材料,微处理器是包含CPU的一片硅片。一部计算机在运转上既有硬件又有软件,没有对方,哪个也没有用。硬件设计指定了计算机能够遵循的命令,而指令告诉计算机该做什么。近年来随着计算机在社会领域的渗透, 单片机的应用正在不断地走向深入,同时带动传统控制检测,日新月益更新。在实时检测和自动控制的单片机应用系统中,单片机往往是作为一个核心部件来使用,仅单片机方面知识是不够的,还应根据具体硬件结构,以及针对具体应用对象特点的软件结合,以作完善。

参考文献

[1] 任治刚.电子信息工程专业英语教程[M].电子工业出版社,2004.

[2] 李霞,杨英杰.电子与通信专业英语[M].电子工业出版社,2005.

[3] 李白萍.电子信息类专业英语[M].西安电子科技大学出版社,2003.

[4] Maxin. Integrated Products [M].A Filter Primer,2001.

图像处理中值滤波器中英文对照外文翻译文献

中英文资料对照外文翻译 一、英文原文 A NEW CONTENT BASED MEDIAN FILTER ABSTRACT In this paper the hardware implementation of a contentbased median filter suitabl e for real-time impulse noise suppression is presented. The function of the proposed ci rcuitry is adaptive; it detects the existence of impulse noise in an image neighborhood and applies the median filter operator only when necessary. In this way, the blurring o f the imagein process is avoided and the integrity of edge and detail information is pre served. The proposed digital hardware structure is capable of processing gray-scale im ages of 8-bit resolution and is fully pipelined, whereas parallel processing is used to m inimize computational time. The architecturepresented was implemented in FPGA an d it can be used in industrial imaging applications, where fast processing is of the utm ost importance. The typical system clock frequency is 55 MHz. 1. INTRODUCTION Two applications of great importance in the area of image processing are noise filtering and image enhancement [1].These tasks are an essential part of any image pro cessor,whether the final image is utilized for visual interpretation or for automatic an alysis. The aim of noise filtering is to eliminate noise and its effects on the original im age, while corrupting the image as little as possible. To this end, nonlinear techniques (like the median and, in general, order statistics filters) have been found to provide mo re satisfactory results in comparison to linear methods. Impulse noise exists in many p ractical applications and can be generated by various sources, including a number of man made phenomena, such as unprotected switches, industrial machines and car ign ition systems. Images are often corrupted by impulse noise due to a noisy sensor or ch annel transmission errors. The most common method used for impulse noise suppressi on n forgray-scale and color images is the median filter (MF) [2].The basic drawback o f the application of the MF is the blurringof the image in process. In the general case,t he filter is applied uniformly across an image, modifying pixels that arenot contamina ted by noise. In this way, the effective elimination of impulse noise is often at the exp ense of an overalldegradation of the image and blurred or distorted features[3].In this paper an intelligent hardware structure of a content based median filter (CBMF) suita ble for impulse noise suppression is presented. The function of the proposed circuit is to detect the existence of noise in the image window and apply the corresponding MF

电子信息工程专业课程翻译中英文对照表

电子信息工程专业课程名称中英文翻译对照 (2009级培养计划)

实践环节翻译

高等数学Advanced Mathematics 大学物理College Physics 线性代数Linear Algebra 复变函数与积分变换Functions of Complex Variable and Integral Transforms 概率论与随机过程Probability and Random Process 物理实验Experiments of College Physics 数理方程Equations of Mathematical Physics 电子信息工程概论Introduction to Electronic and Information Engineering 计算机应用基础Fundamentals of Computer Application 电路原理Principles of Circuit 模拟电子技术基础Fundamentals of Analog Electronics 数字电子技术基础Fundamentals of Digital Electronics C语言程序设计The C Programming Language 信息论基础Fundamentals of Information Theory 信号与线性系统Signals and Linear Systems 微机原理与接口技术Microcomputer Principles and Interface Technology 马克思主义基本原理Fundamentals of Marxism 毛泽东思想、邓小平理论 和“三个代表”重要思想 概论 Thoughts of Mao and Deng 中国近现代史纲要Modern Chinese History 思想道德修养与法律基 础 Moral Education & Law Basis 形势与政策Situation and Policy 英语College English 体育Physical Education 当代世界经济与政治Modern Global Economy and Politics 卫生健康教育Health Education 心理健康知识讲座Psychological Health Knowledge Lecture 公共艺术课程Public Arts 文献检索Literature Retrieval 军事理论Military Theory 普通话语音常识及训练Mandarin Knowledge and Training 大学生职业生涯策划 (就业指导) Career Planning (Guidance of Employment ) 专题学术讲座Optional Course Lecture 科技文献写作Sci-tech Document Writing 高频电子线路High-Frequency Electronic Circuits 通信原理Communications Theory 数字信号处理Digital Signal Processing 计算机网络Computer Networks 电磁场与微波技术Electromagnetic Field and Microwave

营运管理 外文翻译 外文文献 对整个行业中营运资金管理的研究

An Analysis of Working Capital Management Results Across Industries Greg Filbeck. Schweser Study Program Thomas M. Krueger. University of Wisconsin-La Crosse Abstract Firms are able to reduce financing costs and/or increase the funds available for expansion by minimizing the amount of funds tied up in current assets. We provide insights into the performance of surveyed firms across key components of working capital management by using the CFO magazine’s annual Working Capital Management Survey. We discover that significant differences exist between industries in working capital measures across time. In addition. we discover that these measures for working capital change significantly within industries across time. Introduction The importance of efficient working capital management is indisputable. Working capital is the difference between resources in cash or readily convertible into cash (Current Assets) and organizational commitments for which cash will soon be required (Current Liabilities). The objective of working capital management is to maintain the optimum balance of each of the working capital components. Business viability relies on the ability to effectively manage receivables. inventory. and payables. Firms are able to reduce financing costs and/or increase the funds available for expansion by minimizing the amount of funds tied up in current assets. Much managerial effort is expended in bringing non-optimal levels of current assets and liabilities back toward optimal levels. An optimal level would be one in which a balance is achieved between risk and efficiency. A recent example of business attempting to maximize working capital management is the recurrent attention being given to the application of Six Sigma? methodology. Six Sigma? methodologies help companies measure and ensure quality in all areas of the enterprise. When used to identify and rectify discrepancies. inefficiencies and erroneous transactions in the financial supply chain. Six Sigma? reduces Days Sales Outstanding (DSO). accelerates the payment cycle. improves customer satisfaction and reduces the necessary amount and cost of working capital needs. There appear to be many success stories. including Jennifer Towne’s (2002) r eport of a 15 percent decrease in days that sales are outstanding. resulting in an increased cash flow of approximately $2 million at Thibodaux Regional Medical Center. Furthermore. bad debts declined from $3.4 million to $600.000. However. Waxer’s (2003) study of multiple firms employing Six Sigma? finds that it is really a “get rich slow” technique with a rate of return hovering in the 1.2 – 4.5 percent range.

公司营运资金管理分析

公司营运资金管理分析 比亚迪股份有限公司营运资金管理分析 一、比亚迪简介 比亚迪股份有限公司(以下简称“比亚迪”)创立于1995年,是一家香港上市的高新技术民营企业。LI前,比亚迪在全国范围内,已在广东、北京、陕西、上海等地共建有九大生产基地,总面积将近700万平方米,并在美国、欧洲、日本、韩国、印度、台湾、香港等地设有分公司或办事处,现员工总数已超过13万人。 2002年7月31日,比亚迪在香港主板发行上市(股票代码:1211HK),创 下了54支H股最高发行价记录。2007年,比亚迪电子(国际)有限公司(股票代码:028o. HK)在香港主板顺利上市,表现理想。 比亚迪设立中央研究院、电子研究院、汽车工程研究院以及电力科学研究院,负责高科技产品和技术的研发,以及产业和市场的研究等;拥有可以从硬件、软件以及测试等方面提供产品设计和项LI管理的专业队伍,拥有多种产品的完全自主开发经验与数据积累,逐步形成了自身特色并具有国际水平的技术开发平台。强大的研发实力是比亚迪迅速发展的根本。 比亚迪现拥有IT和汽车两大产业群。公司IT产业主要包括二次充电电池、充电器、电声产品、连接器、液晶显示屏模组、塑胶机构件、金属零部件、五金电子产品、手机按键、键盘、柔性电路板、微电子产品、LED产品、光电子产品等以及手机装饰、手机设计、手机组装业务等。公司坚持不懈地致力于技术创新、研发实力的提升和服务体系的完善,主要客户为诺基亚、摩托罗拉、三星等国际通讯业顶端客户群体。目前,比亚迪作为全球领先的二次充电电池制造商,IT及电子零部件产业已覆盖手机所有核心零部件及组装业务,银电池、手机用锂电池、手机按键在全球的市场份额均已达到笫一位。

基于FPGA的卡尔曼滤波器的设计

基于FPGA的卡尔曼滤波器的设计 时间:2010-04-12 12:52:33 来源:电子科技作者:米月琴,黄军荣西安电子科技大学摘要:针对电路设计中经常碰到数据的噪声干扰现象,提出了一种Kalman滤波的FPGA实现方法。该方法采用了TI公司的高精度模数转换器ADSl25l以及Altera公司的EPlCl2,首先用卡尔曼滤波算法 设计了一个滤波器,然后将该滤波器分解成简单的加、减、乘、除运算。通过基于FPGA平台的硬件与 软件的合理设计,成功地实现了数据噪声的滤除设计,并通过实践仿真计算,验证了所实现滤波的有效性。 关键词:卡尔曼;FPGA;最小方差估计 卡尔曼滤波是一个“Optimal Recursive Data Processing Algorithm(最优化自回归数据处 理算法)”,对于解决很大部分的问题,是最优化的,效率最高甚至是最有用的。传统的卡尔曼滤波是 在DSP上实现的。但是DSP成本相对较高,而且指令是串行执行的,不能满足有些要求较高的场合。而FPGA由于其硬件结构决定了它的并行处理方式,无论在速度还是实时性都更胜一筹。文中以基于FPGA 器件和A/D转换器的数据采集系统为硬件平台,进行了卡尔曼滤波算法设计,详述了基于FPGA的卡尔 曼滤波器的设计实现。 1 卡尔曼滤波算法 工程中,为了了解工程对象(滤波中称为系统)的各个物理量(滤波中称为状态)的确切数值,或为了 达到对工程对象进行控制的目的,必须利用测量手段对系统的各个状态进行测量。但是,量测值可能仅 是系统的部分状态或是部分状态的线性组合,且量测值中有随机误差(常称为量测噪声)。最优估计就是 针对上述问题的一种解决方法。它能将仅与部分状态有关的测量进行处理,得出从统计意义上讲误差最 小的更多状态的估值。误差最小的标准常称为估计准则,根据不同的估计准则和估计计算方法,有各种 不同的最优估计,卡尔曼滤波是一种递推线性最小方差估计的最优估计。 系统的状态方程可设定为 式(3)为系统噪声。设设备的量测噪声为Vk,系统得量测方程为

IIR数字滤波器的设计外文文献以及翻译

IIR Digita Filter Design An important step in the development of a digital filter is the determination of a realizable transfer function G(z) approximating the given frequency response specifications. If an IIR filter is desired,it is also necessary to ensure that G(z) is stable. The process of deriving the transfer function G(z) is called digital filter design. After G(z) has been obtained, the next step is to realize it in the form of a suitable filter structure. In chapter 8,we outlined a variety of basic structures for the realization of FIR and IIR transfer functions. In this chapter,we consider the IIR digital filter design problem. The design of FIR digital filters is treated in chapter 10. First we review some of the issues associated with the filter design problem. A widely used approach to IIR filter design based on the conversion of a prototype analog transfer function to a digital transfer function is discussed next. Typical design examples are included to illustrate this approach. We then consider the transformation of one type of IIR filter transfer function into another type, which is achieved by replacing the complex variable z by a function of z. Four commonly used transformations are summarized. Finally we consider the computer-aided

电子信息工程外文翻译外文文献英文文献微处理器

外文资料 所译外文资料: 1. 作者G..Bouwhuis, J.Braat, A.Huijser 2. 书名:Principles of Optical Disk Systems 3. 出版时间:1991年9月 4. 所译章节:Session 2/Chapter9, Session 2/Chapter 11 原文: Microprocessor One of the key inventions in the history of electronics, and in fact one of the most important inventions ever period, was the transistor. As time progressed after the inven ti on of LSI in tegrated circuits, the tech no logy improved and chips became smaller, faster and cheaper. The functions performed by a processor were impleme nted using several differe nt logic chips. In tel was the first compa ny to in corporate all of these logic comp onents into a si ngle chip, this was the first microprocessor. A microprocessor is a complete computati on engine that is fabricated on a sin gle chip. A microprocessor executes a collecti on of machi ne in struct ions that tell the processor what to do. Based on the in struct ions, a microprocessor does three basic things: https://www.sodocs.net/doc/a211182324.html,ing the ALU (Arithmetic/Logic Unit), a microprocessor can perform mathematical operatio ns like additi on, subtract ion, multiplicatio n and divisi on; 2.A microprocessor can move data from one memory location to another; 3.A microprocessor can make decisi ons and jump to a new set of in struct ions based on those decisi ons. There may be very sophisticated things that a microprocessor does, but those are its three basic activities. Microprocessor has an address bus that sends an address to memory, a data bus that can send data to memory or receive data from memory, an RD(read) and WR(write) line that lets a clock pulse sequenee the processor and a reset li ne that resets the program coun ter to zero(or whatever) and restarts executi on. And let ' s assume that both the address and data buses are 8 bits wide here. Here are the comp onents of this simple microprocessor: 1. Registers A, B and C are simply latches made out of flip-flops. 2. The address latch is just like registers A, B and C. 3. The program coun ter is a latch with the extra ability to in creme nt by 1 whe n told to do so, and also to reset to zero whe n told to do so. 4. The ALU could be as simple as an 8-bit adder, or it might be able to add, subtract, multiply and divide 8- bit values. Let ' s assume the latter here. 5. The test register is a special latch that can hold values from comparisons performed in the ALU. An ALU can normally compare two numbers send determine if they are equal, if one is greater

企业营运资金管理中英文对照外文翻译文献

中英文对照外文翻译文献 (文档含英文原文和中文翻译) 原文: Effects Of Working Capital Management On Sme Profitability The corporate finance literature has traditionally focused on the study of long-term financial decisions. Researchers have particularly offered studies analyzing investments, capital structure, dividends or company valuation, among other topics. But the investment that firms make in short-term assets, and the resources used with maturities of under one year, represent the main share of items on a firm’s balance sheet. In fact, in our sample the current assets of small and medium-sized Spanish firms represent 69.48 percent of their assets, and at the same time their current liabilities represent more than 52.82 percent of their liabilities. Working capital management is important because of its effects on the firm’s profitability and risk, and consequently its value (Smith, 1980). On the one hand, maintaining high inventory levels reduces the cost of possible interruptions in the production process, or of loss of business due to the scarcity of products, reduces

维纳最速下降法滤波器卡尔曼滤波器设计及Matlab仿真

信息融合大作业 ——维纳最速下降法滤波器,卡尔曼滤波器设计及Matlab仿真 1.滤波问题浅谈 估计器或滤波器这一术语通常用来称呼一个系统,设计这样的系统是为了从含有噪声的数据中提取人们感兴趣的,接近规定质量的信息。由于这样一个宽目标,估计理论应用于诸如通信、雷达、声纳、导航、地震学、生物医学工程、 金融工程等众多不同的领域。例如,考虑一个数字通信系统,其基本形式由发

射机、信道和接收机连接组成。发射机的作用是把数字源(例如计算机)产生的0、1符号序列组成的消息信号变换成为适合于信道上传送的波形。而由于符号间干扰和噪声的存在,信道输出端收到的信号是含有噪声的或失真的发送信号。接收机的作用是,操作接收信号并把原消息信号的一个可靠估值传递给系统输出端的某个用户。随着通信系统复杂度的提高,对原消息信号的还原成为通信系统中最为重要的环节,而噪声是接收端需要排除的最主要的干扰,人们也设计出了针对各种不同条件应用的滤波器,其中最速下降算法是一种古老的最优化技术,而卡尔曼滤波器随着应用条件的精简成为了普适性的高效滤波器。2.维纳最速下降算法滤波器 2.1 最速下降算法的基本思想 考虑一个代价函数,它是某个未知向量的连续可微分函数。函数 将的元素映射为实数。这里,我们要寻找一个最优解。使它满足如下条件 (2.1) 这也是无约束最优化的数学表示。 特别适合于自适应滤波的一类无约束最优化算法基于局部迭代下降的算法: 从某一初始猜想出发,产生一系列权向量,使得代价函数在算法的每一次迭代都是下降的,即 其中是权向量的过去值,而是其更新值。 我们希望算法最终收敛到最优值。迭代下降的一种简单形式是最速下降法,该方法是沿最速下降方向连续调整权向量。为方便起见,我们将梯度向量表示为

数字滤波器的外文翻译

FIR 数字滤波器的有限字长系数优化的比较研究 拜彻尔,泰勒,罗兰 威尔士大学纽波特学院运算工程学校 摘要:实时数字滤波器频率响应的精度受实现时系数约束条件即有限字长(FWL)的影响。该文仅考虑FIR 数字滤波器有关的FWL 问题。准确和近似响应之间的最大误差限的约束条件所对应的理论问题和统计误差值都进行了详细的研究。利用实数值遗传算法作为优化工具,并由若干设计案例的FWL 效应获得其最大误差限和误差值。由此,完成了简单凑整逼近、遗传算法优化、整数规划法,以及简单希尔登山者方法之间的比较。 关键词:实时数字滤波器; 有限字长;遗传算法;整数规划 1. 前言 FIR 数字滤波器广泛用于图像处理、移动通信、医疗电子,以及很多其他的信号处理应用。为降低能耗和提高运算量,截断系数到最短长度是有优势的。然而,该截断会引起滤波嚣设计参数的变化,在某些情况下这是不可接收的。此即优化问题,即尽可能地选择近似系数值的微小变化量,以便最好的服从设计规范标准。针对有限脉冲响应(FIR)滤波器形式结构的线性相位已被证明是鲁棒的,因而FWL 系数的自我实现的研究是极具有吸引力的[1]。FWL FIR 对称数字滤波器的研究涉及到一组系数的选择,从而这个新频率响应可以作为无限准确系数截断的一个结果,可以最大的接近所给定的规范频率响应。 已知的为解决该问题所使用的算法均基于两种方法:局部搜索法[2]和整数规划分支界限法[3,4]。局部搜索法需要选择一组可行的FWL 系数(称为四舍五入值),用以给出一个频率响应并用以检验H 的领域。同时要选定滤波器的传递函数,以便得到更好的滤波器H',即具有低误差函数的滤波器。如果找到了这样的一个滤波器H',那么便可用H'来代替H ,而算法即可进入下一步或者终止。分支界限算法涉及对一组可能解所构成的树的系统性修正,这些解依赖于由枚举总数所确定的下界值。这两种算法本质上计算密集,且不能保证全局优化。其问题即是在于进一步复合,使其更加灵敏以便增加滤波器长度。 2. FWL 系数及误差目标函数 用以导出FWL 系数的最常用定点算法是直接量化法。使用标准滤波器设计技术导出的高精度系数在该方法中首次被利用,以得出FWL 的量化系数。如下量化系数的起始解给出。 h ri =round[h ei 2B-1] i=0,1,2,...,N-1 (1) 这里,h ri 为四舍五入系数,hei 为高精度系数,B 为用以描述系数的位数,N 为滤波器长度。 优化过程的主要目的在于极小化目标函数,其明确目标为获得一个与期望的响应尽可能接近的滤波器频率响应。目标函数被用于500个等距频率的格点。 目标函数通过以下式来评价: }H max ,H 110max{max }H H 1{ObjV s p s s p p i i L s i 2 i P i 2 i -++-=∑∑== (2) H ip =遗传算法优化滤波器在通带中对应频率的幅值响应 H is =遗传算法优化滤波器在阻带中对应频率的幅值响应 L=频率格点的数目(500)

营运资金管理外文文献翻译

文献出处:Enqvist, Julius, Michael Graham, and Jussi Nikkinen. "The impact of working capital management on firm profitability in different business cycles: evidence from Finland." Research in International Business and Finance 32 (2014): 36-49. 原文 The impact of working capital management on firm profitability in different business cycles: Evidence from Finland 1. Introduction This paper investigates the effect of the business cycle on the link between working capital, the difference between current assets and current liabilities, and corporate performance. Efficient working capital management is recognized as an important aspect of financial management practices in all organizational forms. In acknowledgement of this importance, the CFO Magazine publishes an annual study of corporate working capital management performance in many countries. The extensive literature indicates that it impacts directly on corporate liquidity ( Kim et al., 1998 and Opler et al., 1999), profitability (e.g., Shin and Soenen, 1998, Deloof, 2003, Lazaridis and Tryfonidis, 2006 and Ukaegbu, 2014), and solvency (e.g.,Berryman, 1983 and Peel and Wilson, 1994). It is reasonable to assume that economy-wide fluctuations exogenous to the operations of the firm play an important role in the demand for firms’ products and any financing decision. Korajczyk and Levy (2003), for instance, suggest that firms time debt issuance based on economic conditions. Also, given that retained earnings are a significant component of working capital, business cycles can be said to affect all enterprises financing source through its effect on economic growth and sales. For example, when company sales weaken it engenders earning declines, thereby, affecting an important source of working capital. The recent global economic downturn with crimping consumer demand is an excellent example of this. The crisis,

直流电机运行状态的卡尔曼滤波估计器设计.doc

二 〇 一 五 年 六 月 题 目:直流电机运行状态的卡尔曼滤波估计器设计 学生姓名:张傲 学 院:电力学院 系 别:电力系 专 业:风能与动力工程 班 级:风能11-1 指导教师:董朝轶 教授

摘要 卡尔曼滤波是一个迭代自回归算法,对于连续运动状态用中的大部分问题它都能够给出最优的预测。它已经广泛应用了近半个世纪,例如数据的融合,机械的导航乃至军用雷达的导航等等。卡尔曼滤波一般用于动态数据的处理,是从混沌的信号中提取有用信号消除误差的参数估计法。卡尔曼滤波是依据上一个估计数值和当下的检测数据运用递推估计算出当前的估计值。通过状态方程运用递推的方法进行估计,可以建立物体运动的模型。本文采用的工程设计对运行状态下的直流电机进行参数的计算和校验。而且直流电机的调节性能非常好只需要加上电阻调压就可以了,而且启动曲线非常好,启动的转矩大适合高精度的控制。而交流电机调速需要变频,控制相对复杂一些,而对于设计无论是哪种电机都不影响结果,所以本实验采用直流电机。简单来说卡尔曼滤波就是对被观测量进行一个物理的建模,目的是用‘道理’来约束观测结果,减少噪声的影响。因此卡尔曼滤波是根据一个事物的当前状态预测它的下一个状态的过程。 此设计主要是通过对直流电机的数学模型利用MATLAB来设计卡尔曼滤波估计,进行仿真编程建模,进而对系统进行评估,并且分析估计误差。 关键词:卡尔曼滤波器;直流电机;MATLAB

Abstract Kalman filter is an iterative autoregression algorithm for continuous motion of most of the problems with it are able to give the best prediction. And it has been widely used for nearly half a century, such as the integration of data, as well as military machinery of navigation radar navigation, and so on. Kalman filter is generally used to process dynamic data, extract useful signal parameter estimation method to eliminate errors from the chaotic signal. Kalman filter is based on an estimate on the value and the current detection data is calculated using recursive estimation current estimates. By using recursive state equation method to estimate the movement of objects can be modeled. The paper describes the engineering design of the DC motor running state parameter calculation and verification. The DC motor performance and adjust very well simply by adding resistance regulator on it, and start curve is very good, start torque for precision control. The required frequency AC motor speed control is relatively complicated, and for the design of either the motor does not affect the outcome.In order to facilitate learning, so wo use the DC motor. Simply the Kalman filter is to be observables conduct a physical modeling; the purpose is to use 'sense' to restrict the observations to reduce the influence of noise. Therefore, the Kalman filter is based on the current state of things predict its next state of the process. This design is mainly through the DC motor mathematical model using MATLAB to design the Kalman filter estimation, simulation modeling program, and then to evaluate the system and analyze the estimation error. Keywords:Kalman filter; DC;MATLAB

相关主题